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Lines Matching defs:bf54x

60     } bf54x;
362   bfin_sic_forward_interrupts (me, &sic->bf54x.isr0, &sic->bf54x.imask0, &sic->bf54x.iar0);
363   bfin_sic_forward_interrupts (me, &sic->bf54x.isr1, &sic->bf54x.imask1, &sic->bf54x.iar4);
364   bfin_sic_forward_interrupts (me, &sic->bf54x.isr2, &sic->bf54x.imask2, &sic->bf54x.iar8);
401     case mmr_offset(bf54x.imask0) ... mmr_offset(bf54x.imask2):
405     case mmr_offset(bf54x.iar0) ... mmr_offset(bf54x.iar11):
406     case mmr_offset(bf54x.iwr0) ... mmr_offset(bf54x.iwr2):
409     case mmr_offset(bf54x.isr0) ... mmr_offset(bf54x.isr2):
448     case mmr_offset(bf54x.imask0) ... mmr_offset(bf54x.imask2):
449     case mmr_offset(bf54x.iar0) ... mmr_offset(bf54x.iar11):
450     case mmr_offset(bf54x.iwr0) ... mmr_offset(bf54x.iwr2):
451     case mmr_offset(bf54x.isr0) ... mmr_offset(bf54x.isr2):
586    on the BF54x/BF561 makes this pretty hard to pull off since their
744     case 0: bfin_sic_port_event (me, &sic->bf54x.isr0, bit, level); break;
745     case 1: bfin_sic_port_event (me, &sic->bf54x.isr0, bit, level); break;
746     case 2: bfin_sic_port_event (me, &sic->bf54x.isr0, bit, level); break;
750   if (sic->bf54x.iwr0 & bit)
752   if (sic->bf54x.iwr1 & bit)
754   if (sic->bf54x.iwr2 & bit)
952       sic->bf54x.imask0 = sic->bf54x.imask1 = sic->bf54x.imask2 = 0;
953       sic->bf54x.isr0 = sic->bf54x.isr1 = sic->bf54x.isr2 = 0;
954       sic->bf54x.iwr0 = sic->bf54x.iwr1 = sic->bf54x.iwr2 = 0xFFFFFFFF;
955       sic->bf54x.iar0 = 0x10000000;
956       sic->bf54x.iar1 = 0x33322221;
957       sic->bf54x.iar2 = 0x66655444;
958       sic->bf54x.iar3 = 0x00000000;
959       sic->bf54x.iar4 = 0x32222220;
960       sic->bf54x.iar5 = 0x44433333;
961       sic->bf54x.iar6 = 0x00444664;
962       sic->bf54x.iar7 = 0x00000000;
963       sic->bf54x.iar8 = 0x44111111;
964       sic->bf54x.iar9 = 0x44444444;
965       sic->bf54x.iar10 = 0x44444444;
966       sic->bf54x.iar11 = 0x55444444;