Lines Matching refs:op1
25 sim_fpu op1;
31 sim_fpu_32to (&op1, x);
33 status = sim_fpu_add (&ans, &op1, &op2);
44 sim_fpu op1;
50 sim_fpu_32to (&op1, x);
52 status = sim_fpu_sub (&ans, &op1, &op2);
63 sim_fpu op1;
69 sim_fpu_32to (&op1, x);
71 status = sim_fpu_mul (&ans, &op1, &op2);
82 sim_fpu op1;
88 sim_fpu_32to (&op1, x);
90 status = sim_fpu_div (&ans, &op1, &op2);
101 sim_fpu op1;
107 sim_fpu_32to (&op1, x);
109 status = sim_fpu_rem (&ans, &op1, &op2);
120 sim_fpu op1;
125 sim_fpu_32to (&op1, x);
126 status = sim_fpu_neg (&ans, &op1);
137 sim_fpu op1;
142 sim_fpu_32to (&op1, x);
143 status = sim_fpu_abs (&ans, &op1);
154 sim_fpu op1;
159 sim_fpu_32to (&op1, x);
160 status = sim_fpu_sqrt (&ans, &op1);
171 sim_fpu op1;
176 sim_fpu_32to (&op1, x);
177 status = sim_fpu_inv (&ans, &op1);
188 sim_fpu op1;
194 sim_fpu_32to (&op1, x);
196 status = sim_fpu_min (&ans, &op1, &op2);
207 sim_fpu op1;
213 sim_fpu_32to (&op1, x);
215 status = sim_fpu_max (&ans, &op1, &op2);
226 sim_fpu op1;
229 sim_fpu_32to (&op1, x);
232 if (sim_fpu_is_nan (&op1)
246 sim_fpu op1;
249 sim_fpu_32to (&op1, x);
251 return sim_fpu_is_eq (&op1, &op2);
257 sim_fpu op1;
260 sim_fpu_32to (&op1, x);
262 return sim_fpu_is_ne (&op1, &op2);
268 sim_fpu op1;
271 sim_fpu_32to (&op1, x);
273 return sim_fpu_is_lt (&op1, &op2);
279 sim_fpu op1;
282 sim_fpu_32to (&op1, x);
284 return sim_fpu_is_le (&op1, &op2);
290 sim_fpu op1;
293 sim_fpu_32to (&op1, x);
295 return sim_fpu_is_gt (&op1, &op2);
301 sim_fpu op1;
304 sim_fpu_32to (&op1, x);
306 return sim_fpu_is_ge (&op1, &op2);
312 sim_fpu op1;
315 sim_fpu_32to (&op1, x);
317 return sim_fpu_is_nan (&op1) || sim_fpu_is_nan (&op2);
324 sim_fpu op1;
327 sim_fpu_32to (&op1, x);
328 sim_fpu_to64 (&res, &op1);
336 sim_fpu op1;
339 sim_fpu_64to (&op1, x);
340 sim_fpu_to32 (&res, &op1);
392 sim_fpu op1;
395 sim_fpu_32to (&op1, x);
396 sim_fpu_to32i (&res, &op1, sim_fpu_round_near);
403 sim_fpu op1;
406 sim_fpu_64to (&op1, x);
407 sim_fpu_to32i (&res, &op1, sim_fpu_round_near);
414 sim_fpu op1;
417 sim_fpu_64to (&op1, x);
418 sim_fpu_to64i (&res, &op1, sim_fpu_round_near);
425 sim_fpu op1;
428 sim_fpu_32to (&op1, x);
429 sim_fpu_to32u (&res, &op1, sim_fpu_round_near);
439 sim_fpu op1;
445 sim_fpu_64to (&op1, x);
447 status = sim_fpu_add (&ans, &op1, &op2);
458 sim_fpu op1;
464 sim_fpu_64to (&op1, x);
466 status = sim_fpu_sub (&ans, &op1, &op2);
477 sim_fpu op1;
483 sim_fpu_64to (&op1, x);
485 status = sim_fpu_mul (&ans, &op1, &op2);
496 sim_fpu op1;
502 sim_fpu_64to (&op1, x);
504 status = sim_fpu_div (&ans, &op1, &op2);
515 sim_fpu op1;
521 sim_fpu_64to (&op1, x);
523 status = sim_fpu_rem (&ans, &op1, &op2);
534 sim_fpu op1;
539 sim_fpu_64to (&op1, x);
540 status = sim_fpu_neg (&ans, &op1);
551 sim_fpu op1;
556 sim_fpu_64to (&op1, x);
557 status = sim_fpu_abs (&ans, &op1);
568 sim_fpu op1;
573 sim_fpu_64to (&op1, x);
574 status = sim_fpu_sqrt (&ans, &op1);
585 sim_fpu op1;
590 sim_fpu_64to (&op1, x);
591 status = sim_fpu_inv (&ans, &op1);
602 sim_fpu op1;
608 sim_fpu_64to (&op1, x);
610 status = sim_fpu_min (&ans, &op1, &op2);
621 sim_fpu op1;
627 sim_fpu_64to (&op1, x);
629 status = sim_fpu_max (&ans, &op1, &op2);
640 sim_fpu op1;
643 sim_fpu_64to (&op1, x);
646 if (sim_fpu_is_nan (&op1)
660 sim_fpu op1;
663 sim_fpu_64to (&op1, x);
665 return sim_fpu_is_eq (&op1, &op2);
671 sim_fpu op1;
674 sim_fpu_64to (&op1, x);
676 return sim_fpu_is_ne (&op1, &op2);
682 sim_fpu op1;
685 sim_fpu_64to (&op1, x);
687 return sim_fpu_is_lt (&op1, &op2);
693 sim_fpu op1;
696 sim_fpu_64to (&op1, x);
698 return sim_fpu_is_le (&op1, &op2);
704 sim_fpu op1;
707 sim_fpu_64to (&op1, x);
709 return sim_fpu_is_gt (&op1, &op2);
715 sim_fpu op1;
718 sim_fpu_64to (&op1, x);
720 return sim_fpu_is_ge (&op1, &op2);
726 sim_fpu op1;
729 sim_fpu_64to (&op1, x);
731 return sim_fpu_is_nan (&op1) || sim_fpu_is_nan (&op2);
Indexes created Mon Sep 28 00:25:45 UTC 2026