Cross Reference: /src/external/gpl3/gdb.old/dist/sim/cris/cpuv10.c

Lines Matching refs:newval
42 crisv10f_h_v32_non_v32_set (SIM_CPU *current_cpu, BI newval)
44   SET_H_V32_NON_V32 (newval);
58 crisv10f_h_pc_set (SIM_CPU *current_cpu, USI newval)
60   SET_H_PC (newval);
74 crisv10f_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
76   SET_H_GR (regno, newval);
90 crisv10f_h_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
92   SET_H_GR_PC (regno, newval);
106 crisv10f_h_gr_real_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
108   CPU (h_gr_real_pc[regno]) = newval;
122 crisv10f_h_raw_gr_pc_set (SIM_CPU *current_cpu, UINT regno, SI newval)
124   SET_H_RAW_GR_PC (regno, newval);
138 crisv10f_h_sr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
140   SET_H_SR (regno, newval);
154 crisv10f_h_sr_v10_set (SIM_CPU *current_cpu, UINT regno, SI newval)
156   SET_H_SR_V10 (regno, newval);
170 crisv10f_h_cbit_set (SIM_CPU *current_cpu, BI newval)
172   CPU (h_cbit) = newval;
186 crisv10f_h_cbit_move_set (SIM_CPU *current_cpu, BI newval)
188   SET_H_CBIT_MOVE (newval);
202 crisv10f_h_cbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
204   SET_H_CBIT_MOVE_PRE_V32 (newval);
218 crisv10f_h_vbit_set (SIM_CPU *current_cpu, BI newval)
220   CPU (h_vbit) = newval;
234 crisv10f_h_vbit_move_set (SIM_CPU *current_cpu, BI newval)
236   SET_H_VBIT_MOVE (newval);
250 crisv10f_h_vbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
252   SET_H_VBIT_MOVE_PRE_V32 (newval);
266 crisv10f_h_zbit_set (SIM_CPU *current_cpu, BI newval)
268   CPU (h_zbit) = newval;
282 crisv10f_h_zbit_move_set (SIM_CPU *current_cpu, BI newval)
284   SET_H_ZBIT_MOVE (newval);
298 crisv10f_h_zbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
300   SET_H_ZBIT_MOVE_PRE_V32 (newval);
314 crisv10f_h_nbit_set (SIM_CPU *current_cpu, BI newval)
316   CPU (h_nbit) = newval;
330 crisv10f_h_nbit_move_set (SIM_CPU *current_cpu, BI newval)
332   SET_H_NBIT_MOVE (newval);
346 crisv10f_h_nbit_move_pre_v32_set (SIM_CPU *current_cpu, BI newval)
348   SET_H_NBIT_MOVE_PRE_V32 (newval);
362 crisv10f_h_xbit_set (SIM_CPU *current_cpu, BI newval)
364   CPU (h_xbit) = newval;
378 crisv10f_h_ibit_set (SIM_CPU *current_cpu, BI newval)
380   SET_H_IBIT (newval);
394 crisv10f_h_ibit_pre_v32_set (SIM_CPU *current_cpu, BI newval)
396   CPU (h_ibit_pre_v32) = newval;
410 crisv10f_h_pbit_set (SIM_CPU *current_cpu, BI newval)
412   CPU (h_pbit) = newval;
426 crisv10f_h_ubit_set (SIM_CPU *current_cpu, BI newval)
428   SET_H_UBIT (newval);
442 crisv10f_h_ubit_pre_v32_set (SIM_CPU *current_cpu, BI newval)
444   CPU (h_ubit_pre_v32) = newval;
458 crisv10f_h_insn_prefixed_p_set (SIM_CPU *current_cpu, BI newval)
460   SET_H_INSN_PREFIXED_P (newval);
474 crisv10f_h_insn_prefixed_p_pre_v32_set (SIM_CPU *current_cpu, BI newval)
476   CPU (h_insn_prefixed_p_pre_v32) = newval;
490 crisv10f_h_prefixreg_pre_v32_set (SIM_CPU *current_cpu, SI newval)
492   CPU (h_prefixreg_pre_v32) = newval;
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