Cross Reference: /src/external/gpl3/gdb.old/dist/sim/d10v/simops.c

Lines Matching refs:ACC
426 						 ((int)(ACC (OP[i]) >> 32) & 0xff),
427 						 ((unsigned long) ACC (OP[i])) & 0xffffffff);
613   tmp = SEXT40 (ACC (OP[0]));
657   tmp = SEXT40(ACC (OP[0])) + (SEXT16 (GPR (OP[1])) << 16 | GPR (OP[1] + 1));
680   tmp = SEXT40(ACC (OP[0])) + SEXT40(ACC (OP[1]));
731   tmp = SEXT40(ACC (OP[2])) + SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1));
744   tmp = SEXT40(ACC (OP[1])) + SEXT40(ACC (OP[2]));
760   tmp = SEXT40 (ACC (OP[2])) + SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1));
788   tmp = SEXT40(ACC (OP[1])) + SEXT40(ACC (OP[2]));
991   SET_PSW_F0 ((SEXT40(ACC (OP[0])) < SEXT40(ACC (OP[1]))) ? 1 : 0);
1011   SET_PSW_F0 (((ACC (OP[0]) & MASK40) == (ACC (OP[1]) & MASK40)) ? 1 : 0);
1275   tmp = SEXT40(ACC (OP[1]));
1575   tmp += SEXT40 (ACC (OP[0]));
1601   tmp = ((SEXT40 (ACC (OP[0])) + tmp) & MASK40);
1620   tmp = ((ACC (OP[0]) + tmp) & MASK40);
1655   if (tmp > SEXT40 (ACC (OP[0])))
1662       tmp = ACC (OP[0]);
1676   if (SEXT40 (ACC (OP[1])) > SEXT40 (ACC (OP[0])))
1678       tmp = ACC (OP[1]);
1683       tmp = ACC (OP[0]);
1721   if (tmp < SEXT40(ACC (OP[0])))
1728       tmp = ACC (OP[0]);
1742   if (SEXT40(ACC (OP[1])) < SEXT40(ACC (OP[0])))
1744       tmp = ACC (OP[1]);
1749       tmp = ACC (OP[0]);
1771   tmp = SEXT40(ACC (OP[0])) - tmp;
1799   tmp = ((SEXT40 (ACC (OP[0])) - tmp) & MASK40);
1818   tmp = ((ACC (OP[0]) - tmp) & MASK40);
1917   tmp = ACC (OP[1]);
1939   tmp = ACC (OP[1]);
1993   tmp = ((ACC (OP[1]) >> 32) & 0xff);
2004   tmp = (ACC (OP[1]) >> 16);  
2015   tmp = ACC (OP[1]);
2037   tmp = ((ACC (OP[1]) & MASK32)
2049   tmp = ACC (OP[1]) & 0xffff;
2106   tmp = -SEXT40(ACC (OP[0]));
2214   tmp = SEXT56 ((ACC (0) << 16) | (ACC (1) & 0xffff));
2249     tmp = SEXT40 (ACC (OP[1])) << shift;
2251     tmp = SEXT40 (ACC (OP[1])) >> -shift;
2344   tmp = SEXT40(ACC (OP[1]));
2377   tmp = SEXT40(ACC (OP[1]));
2409   tmp = SEXT40(ACC (OP[0])) + (SEXT40(ACC (OP[1])) >> 16);
2464   tmp = SEXT40 (ACC (OP[0]));
2489       tmp = (SEXT40 (ACC (OP[0]))) >> (-GPR (OP[1]));
2524     tmp = SEXT40 (ACC (OP[0])) << (GPR (OP[1]) & 31);
2567   tmp = SEXT40(ACC (OP[0])) << OP[1];
2613       int64_t tmp = ((SEXT40(ACC (OP[0])) >> (GPR (OP[1]) & 31)) & MASK40);
2644   tmp = ((SEXT40(ACC (OP[0])) >> OP[1]) & MASK40);
2667       int64_t tmp = ((uint64_t)((ACC (OP[0]) & MASK40) >> (GPR (OP[1]) & 31)));
2699   tmp = ((uint64_t)(ACC (OP[0]) & MASK40) >> OP[1]);
2978   tmp = SEXT40(ACC (OP[0])) - (SEXT16 (GPR (OP[1])) << 16 | GPR (OP[1] + 1));
3003   tmp = SEXT40(ACC (OP[0])) - SEXT40(ACC (OP[1]));
3044   tmp = SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1)) - SEXT40 (ACC (OP[2]));
3056   tmp = SEXT40 (ACC (OP[1])) - SEXT40(ACC (OP[2]));
3069   tmp = SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1)) - SEXT40(ACC (OP[2]));
3096   tmp = SEXT40(ACC (OP[1])) - SEXT40(ACC (OP[2]));
3176 					     ((int)(ACC (i) >> 32) & 0xff),
3177 					     ((unsigned long) ACC (i)) & 0xffffffff);
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