Cross Reference: /src/external/gpl3/gdb.old/dist/sim/erc32/erc32.c

Lines Matching defs:mec_memcfg

66 #define MEC_MEMCFG	0x010
162 static uint32_t   mec_memcfg;	/* Memory control register */
406     if (rom8) mec_memcfg &= ~0x20000;
407     else mec_memcfg |= 0x20000;
409     mem_ramsz = (256 * 1024) << ((mec_memcfg >> 10) & 7);
410     mem_romsz = (128 * 1024) << ((mec_memcfg >> 18) & 7);
509     mec_memcfg = 0x10000;
628     case MEC_MEMCFG:		/* 0x10 */
629 	*data = mec_memcfg;
868     case MEC_MEMCFG:		/* 0x10 */
870 	mec_memcfg = data;
872 	if (mec_memcfg & 0xc0e08000)
1708     } else if ((addr < mem_romsz) && (mec_memcfg & 0x10000) && (wrp) &&
1709                (((mec_memcfg & 0x20000) && (sz > 1)) || 
1710 		(!(mec_memcfg & 0x20000) && (sz == 0)))) {
1719     } else if ((addr < mem_romsz) && (mec_memcfg & 0x10000) && (wrp) &&
1720                (((mec_memcfg & 0x20000) && (sz > 1)) || 
1721 		(!(mec_memcfg & 0x20000) && (sz == 0)))) {
1789     mec_write(MEC_MEMCFG, (3 << 18) | (4 << 10)); /* 1 MB ROM, 4 MB RAM */

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