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Lines Matching defs:sdisr

64                           12: SDISR: DMA/interrupt status register
169 unsigned_4 sdisr;
171 #define SDISR_SET_BYTE(c,o,b) ((c)->sdisr = SDISR_WR_MASK & (((c)->sdisr & ~LSMASK32((o)*8+7,(o)*8)) | ((b)<< (o)*8)))
172 #define SDISR_CLEAR_FLAG_BYTE(c,o,b) ((c)->sdisr = SDISR_WR_MASK & (((c)->sdisr & ~LSMASK32((o)*8+7,(o)*8)) & ((b)<< (o)*8)))
173 #define SDISR_GET_TDIS(c) ((c)->sdisr & 0x00020000)
174 #define SDISR_SET_TDIS(c) ((c)->sdisr |= 0x00020000)
175 #define SDISR_GET_RDIS(c) ((c)->sdisr & 0x00010000)
176 #define SDISR_SET_RDIS(c) ((c)->sdisr |= 0x00010000)
266 = controller->sdisr = controller->sfcr
295 = controller->sdisr = controller->sfcr
340 case SDISR_REG: register_value = controller->sdisr; break;
399 last_int = controller->sdisr & controller->sdicr;
400 /* HW_TRACE ((me, "sdicr - sdisr %08x sdicr %08x",
401 controller->sdisr, controller->sdicr)); */
403 /* HW_TRACE ((me, "sdicr + sdisr %08x sdicr %08x",
404 controller->sdisr, controller->sdicr)); */
405 next_int = controller->sdisr & controller->sdicr;
422 last_int = controller->sdisr & controller->sdicr;
423 /* HW_TRACE ((me, "sdisr - sdisr %08x sdicr %08x",
424 controller->sdisr, controller->sdicr)); */
426 /* HW_TRACE ((me, "sdisr + sdisr %08x sdicr %08x",
427 controller->sdisr, controller->sdicr)); */
428 next_int = controller->sdisr & controller->sdicr;
530 last_int = controller->sdisr & controller->sdicr;
531 /* HW_TRACE ((me, "tickle - sdisr %08x sdicr %08x", controller->sdisr, controller->sdicr)); */
536 next_int = controller->sdisr & controller->sdicr;
537 /* HW_TRACE ((me, "tickle + sdisr %08x sdicr %08x", controller->sdisr, controller->sdicr)); */