Cross Reference: /src/external/gpl3/gdb.old/dist/sim/mips/interp.c

Lines Matching refs:mips_cpu
665 	struct mips_sim_cpu *mips_cpu = MIPS_SIM_CPU (cpu);
668 	  mips_cpu->register_widths[rn] = WITH_TARGET_WORD_BITSIZE;
670 	  mips_cpu->register_widths[rn] = WITH_TARGET_FLOATING_POINT_BITSIZE;
672 	  mips_cpu->register_widths[rn] = WITH_TARGET_WORD_BITSIZE;
677 	  mips_cpu->register_widths[rn] = 32;
679 	  mips_cpu->register_widths[rn] = 0;
856   struct mips_sim_cpu *mips_cpu = MIPS_SIM_CPU (cpu);
858   if (mips_cpu->register_widths[rn] == 0)
866       mips_cpu->fpr_state[rn - FGR_BASE] = fmt_uninterpreted;
867       if (mips_cpu->register_widths[rn] == 32)
871 	      mips_cpu->fgr[rn - FGR_BASE] =
877 	      mips_cpu->fgr[rn - FGR_BASE] = T2H_4 (*(uint32_t*)memory);
885 	      mips_cpu->fgr[rn - FGR_BASE] = T2H_8 (*(uint64_t*)memory);
890 	      mips_cpu->fgr[rn - FGR_BASE] = T2H_4 (*(uint32_t*)memory);
896   if (mips_cpu->register_widths[rn] == 32)
900 	  mips_cpu->registers[rn] =
906 	  mips_cpu->registers[rn] = T2H_4 (*(uint32_t*)memory);
914 	  mips_cpu->registers[rn] = T2H_8 (*(uint64_t*)memory);
919 	  mips_cpu->registers[rn] = (int32_t) T2H_4(*(uint32_t*)memory);
933   struct mips_sim_cpu *mips_cpu = MIPS_SIM_CPU (cpu);
935   if (mips_cpu->register_widths[rn] == 0)
944       if (mips_cpu->register_widths[rn] == 32)
949 		H2T_8 ((uint32_t) (mips_cpu->fgr[rn - FGR_BASE]));
954 	      *(uint32_t*)memory = H2T_4 (mips_cpu->fgr[rn - FGR_BASE]);
962 	      *(uint64_t*)memory = H2T_8 (mips_cpu->fgr[rn - FGR_BASE]);
967 	      *(uint32_t*)memory = H2T_4 ((uint32_t)(mips_cpu->fgr[rn - FGR_BASE]));
973   if (mips_cpu->register_widths[rn] == 32)
978 	    H2T_8 ((uint32_t) (mips_cpu->registers[rn]));
983 	  *(uint32_t*)memory = H2T_4 ((uint32_t)(mips_cpu->registers[rn]));
992 	    H2T_8 ((uint64_t) (mips_cpu->registers[rn]));
997 	  *(uint32_t*)memory = H2T_4 ((uint32_t)(mips_cpu->registers[rn]));
2525   struct mips_sim_cpu *mips_cpu = MIPS_SIM_CPU (cpu);
2529   if (mips_cpu->exc_suspended > 0)
2531 		    mips_cpu->exc_suspended);
2534   memcpy (mips_cpu->exc_trigger_registers, mips_cpu->registers,
2535 	  sizeof (mips_cpu->exc_trigger_registers));
2536   mips_cpu->exc_suspended = 0;
2542   struct mips_sim_cpu *mips_cpu = MIPS_SIM_CPU (cpu);
2546   if (mips_cpu->exc_suspended > 0)
2548 		   mips_cpu->exc_suspended, exception);
2550   memcpy (mips_cpu->exc_suspend_registers, mips_cpu->registers,
2551 	  sizeof (mips_cpu->exc_suspend_registers));
2552   memcpy (mips_cpu->registers, mips_cpu->exc_trigger_registers,
2553 	  sizeof (mips_cpu->registers));
2554   mips_cpu->exc_suspended = exception;
2560   struct mips_sim_cpu *mips_cpu = MIPS_SIM_CPU (cpu);
2564   if (exception == 0 && mips_cpu->exc_suspended > 0)
2567       if (mips_cpu->exc_suspended != sim_signal_to_host(sd, SIM_SIGTRAP))
2569 		       mips_cpu->exc_suspended);
2571   else if (exception != 0 && mips_cpu->exc_suspended > 0)
2573       if (exception != mips_cpu->exc_suspended)
2575 		       mips_cpu->exc_suspended, exception);
2577       memcpy (mips_cpu->registers, mips_cpu->exc_suspend_registers,
2578 	      sizeof (mips_cpu->registers));
2580   else if (exception != 0 && mips_cpu->exc_suspended == 0)
2584   mips_cpu->exc_suspended = 0;
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