Cross Reference: /src/external/gpl3/gdb.old/dist/sim/riscv/interp.c

Lines Matching defs:sd
35 sim_engine_run (SIM_DESC sd,
42   SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
44   cpu = STATE_CPU (sd, 0);
49       if (sim_events_tick (sd))
50 	sim_events_process (sd);
56 free_state (SIM_DESC sd)
58   if (STATE_MODULES (sd) != NULL)
59     sim_module_uninstall (sd);
60   sim_cpu_free_all (sd);
61   sim_state_free (sd);
72   SIM_DESC sd = sim_state_alloc_extra (kind, callback,
76   STATE_MACHS (sd) = riscv_sim_machs;
77   STATE_MODEL_NAME (sd) = WITH_TARGET_WORD_BITSIZE == 32 ? "RV32G" : "RV64G";
82   if (sim_cpu_alloc_all_extra (sd, 0, sizeof (struct riscv_sim_cpu))
85       free_state (sd);
89   if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
91       free_state (sd);
96   if (STATE_ENVIRONMENT (sd) == ALL_ENVIRONMENT)
97     STATE_ENVIRONMENT (sd) = VIRTUAL_ENVIRONMENT;
100   if (sim_parse_args (sd, argv) != SIM_RC_OK)
102       free_state (sd);
107   if (sim_analyze_program (sd, STATE_PROG_FILE (sd), abfd) != SIM_RC_OK)
109       free_state (sd);
114   if (sim_config (sd) != SIM_RC_OK)
116       free_state (sd);
120   if (sim_post_argv_init (sd) != SIM_RC_OK)
122       free_state (sd);
129       SIM_CPU *cpu = STATE_CPU (sd, i);
131       initialize_cpu (sd, cpu, i);
136   if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
137     sim_do_commandf (sd, "memory-size %#x", DEFAULT_MEM_SIZE);
139   return sd;
144 sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
147   SIM_CPU *cpu = STATE_CPU (sd, 0);
148   host_callback *cb = STATE_CALLBACK (sd);
162   if (STATE_PROG_ARGV (sd) != argv)
164       freeargv (STATE_PROG_ARGV (sd));
165       STATE_PROG_ARGV (sd) = dupargv (argv);
168   if (STATE_PROG_ENVP (sd) != env)
170       freeargv (STATE_PROG_ENVP (sd));
171       STATE_PROG_ENVP (sd) = dupargv (env);
174   cb->argv = STATE_PROG_ARGV (sd);
175   cb->envp = STATE_PROG_ENVP (sd);
177   initialize_env (sd, (void *)argv, (void *)env);
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