Lines Matching refs:imm5
611 /* add sign_extend(imm5), reg */
745 /* mulh sign_extend(imm5), reg2 */
799 /* cmp sign_extend(imm5), reg */
890 /* satadd sign_extend(imm5), reg */
1114 /* mov sign_extend(imm5), reg */
1142 /* sar zero_extend(imm5),reg1 */
1195 /* shl zero_extend(imm5),reg1 */
1247 /* shr zero_extend(imm5),reg1 */
2190 /* sdivun imm5, reg1, reg2, reg3 */
2199 unsigned int imm5;
2203 imm5 = 32 - ((OP[3] & 0x3c0000) >> 17);
2206 divide_this = State.regs[ OP[1] ] << imm5;
2208 divun (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
2225 /* sdivn imm5, reg1, reg2, reg3 */
2234 unsigned int imm5;
2238 imm5 = 32 - ((OP[3] & 0x3c0000) >> 17);
2241 divide_this = (int32_t) (State.regs[ OP[1] ] << imm5);
2243 divn (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
2260 /* sdivhun imm5, reg1, reg2, reg3 */
2269 unsigned int imm5;
2273 imm5 = 32 - ((OP[3] & 0x3c0000) >> 17);
2276 divide_this = State.regs[ OP[1] ] << imm5;
2278 divun (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
2295 /* sdivhn imm5, reg1, reg2, reg3 */
2304 unsigned int imm5;
2308 imm5 = 32 - ((OP[3] & 0x3c0000) >> 17);
2311 divide_this = (int32_t) (State.regs[ OP[1] ] << imm5);
2313 divn (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
2561 /* prepare list12, imm5, imm32 */
2586 /* prepare list12, imm5, imm16-32 */
2611 /* prepare list12, imm5, imm16 */
2636 /* prepare list12, imm5, sp */
Indexes created Sat Sep 12 00:25:55 UTC 2026