1 /* $NetBSD: malta_bus_io.c,v 1.9 2026/05/10 14:56:39 tls Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Platform-specific PCI bus I/O support for the MIPS Malta. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: malta_bus_io.c,v 1.9 2026/05/10 14:56:39 tls Exp $"); 38 39 #include <sys/param.h> 40 41 #include <evbmips/malta/maltareg.h> 42 #include <evbmips/malta/maltavar.h> 43 44 #define CHIP malta 45 #define CHIP_IO /* defined */ 46 47 /* 48 * This platform's PCI I/O region is DEVICE_LITTLE_ENDIAN (tested on 49 * QEMU 10, which has recently had what purports to be a thorough going 50 * over to conform it to the actual hardware) so we need CHIP_LITTLE_ENDIAN 51 * here to accommodate big-endian kernels. 52 * 53 */ 54 #define CHIP_LITTLE_ENDIAN 55 56 #define CHIP_EX_MALLOC_SAFE(v) (((struct malta_config *)(v))->mc_mallocsafe) 57 #define CHIP_EXTENT(v) (((struct malta_config *)(v))->mc_io_ex) 58 59 /* IO region 1 */ 60 #define CHIP_W1_BUS_START(v) 0x00000000UL 61 #define CHIP_W1_BUS_END(v) MALTA_PCIMEM3_SIZE 62 #define CHIP_W1_SYS_START(v) ((u_long)MALTA_PCIMEM3_BASE) 63 #define CHIP_W1_SYS_END(v) ((u_long)MALTA_PCIMEM3_BASE + \ 64 CHIP_W1_BUS_END(v)) 65 66 #include <mips/mips/bus_space_alignstride_chipdep.c> 67