Lines Matching refs:regr
33 {NAME, 1, OPC, 24, ARITH_BYTE_INS | CST4MAP, {{cst4,20}, {regr,16}}}, \
35 {NAME, 2, (OPC<<4)+0xE, 20, ARITH_BYTE_INS | CST4MAP, {{i16,0}, {regr,16}}}, \
37 {NAME, 1, OPC+0x40, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}}
66 {NAME, 1, OPC, 24, ARITH_INS | CST4MAP, {{cst4,20}, {regr,16}}}, \
68 {NAME, 2, (OPC<<4)+0xE, 20, ARITH_INS | CST4MAP, {{i16,0}, {regr,16}}}, \
70 {NAME, 3, (OPC<<4)+0xF, 20, ARITH_INS, {{i32,0}, {regr,16}}}, \
72 {NAME, 1, OPC+0x40, 24, ARITH_INS, {{regr,20}, {regr,16}}}
91 {NAME, 1, OPC1, SHIFT1, SHIFT_INS, {{OPRD,20}, {regr,16}}}, \
93 {NAME, 1, OPC2, 24, SHIFT_INS, {{regr,20}, {regr,16}}}
135 {NAME, 1, OPC, 24, BRANCH_NEQ_INS, {{regr,16}, {dispu5,20}}}
160 {{regr,16}, {regr,12}, {disps9,0}}}, \
163 {{regr,16}, {regr,12}, {disps25,0}}}, \
166 {{cst4,16}, {regr,12}, {disps9,0}}}, \
169 {{cst4,16}, {regr,12}, {disps25,0}}}
207 {NAME, 1, OPC, 20, NO_TYPE_INS, {{regr,16}}}
212 {NAME, 1, OPC, 20, NO_TYPE_INS | FLAGS, {{regr,16}}}
250 {NAME, 2, 0x300800+OPC, 8, NO_TYPE_INS, {{regr,4}, {regr,0}}}
351 {{abs16,0}, {regr,16}}}, \
354 {{abs32,0}, {regr,16}}}, \
357 {{rbase_dispu4,16}, {regr,24}}}, \
360 {{rbase_disps16,16}, {regr,24}}}, \
363 {{rbase_disps32,16}, {regr,24}}}, \
366 {{rindex_disps6,0}, {regr,16}}}, \
369 {{rindex_disps22,0}, {regr,16}}}, \
372 {{rbase_disps12,12}, {regr,16}}}
381 {NAME, 2, 0x320+OPC1, 20, LD_STOR_INS, {{regr,16}, {abs16,0}}}, \
383 {NAME, 3, 0x330+OPC1, 20, LD_STOR_INS, {{regr,16}, {abs32,0}}}, \
386 {{regr,24}, {rbase_dispu4,16}}}, \
389 {{regr,24}, {rbase_disps16,16}}}, \
392 {{regr,24}, {rbase_disps32,16}}}, \
395 {{regr,16}, {rindex_disps6,0}}}, \
397 {NAME, 3, 0x33C+OPC1, 20, LD_STOR_INS, {{regr,16}, {rindex_disps22,0}}}, \
399 {NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC, {{regr,16}, {rbase_disps12,12}}}
451 {"cbitd", 2, 0x300838, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
452 {"cbitd", 2, 0x18047B, 9, CSTBIT_INS, {{ui5,4}, {regr,0}}},
457 {"sbitd", 2, 0x300839, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
458 {"sbitd", 2, 0x18047C, 9, CSTBIT_INS, {{ui5,4}, {regr,0}}},
463 {"tbitd", 2, 0x30083A, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
464 {"tbitd", 2, 0x18047D, 9, CSTBIT_INS, {{ui5,4}, {regr,0}}},
469 {NAME, 2, OPC, 20, NO_TYPE_INS | REG_LIST | FLAG, {{regr,16}, {ui16,0}}}
494 {NAME, 2, OPC1, 20, INS_TYPE | RELAXABLE, {{regr,16}, {disps17,0}}}, \
496 {NAME, 3, OPC2, 20, INS_TYPE | RELAXABLE, {{regr,16}, {disps32,0}}}
524 COP_INST ("mtcr", 0, COP_REG_INS, regr, copregr),
525 COP_INST ("mfcr", 1, COP_REG_INS, copregr, regr),
526 COP_INST ("mtcsr", 2, COPS_REG_INS, regr, copsregr),
527 COP_INST ("mfcsr", 3, COPS_REG_INS, copsregr, regr),
528 COP_INST ("ldcr", 4, COP_REG_INS, regr, copregr),
529 REV_COP_INST ("stcr", 5, COP_REG_INS, copregr, regr),
530 COP_INST ("ldcsr", 6, COPS_REG_INS, regr, copsregr),
531 REV_COP_INST ("stcsr", 7, COPS_REG_INS, copsregr, regr),
537 {{ui4,16}, {regr,0}, {ui16,16}}}
553 {{ui4,16}, {ui4,8}, {regr,4}, {regr,0}}},
556 {{ui4,16}, {ui4,8}, {regr,4}, {regr,0}, {ui16,16}}},
570 {{ui5,18}, {ui5,13}, {ui5,8}, {regr,4}, {regr,0}}},
572 {{ui5,18}, {ui5,13}, {ui5,8}, {regr,4}, {regr,0}}},
575 {"rotb", 1, 0x1FB, 23, NO_TYPE_INS, {{ui3,20}, {regr,16}}},
577 {"rotw", 1, 0xB9, 24, NO_TYPE_INS, {{ui4,20}, {regr,16}}},
579 {"rotd", 2, 0x180478, 9, NO_TYPE_INS, {{ui5,4}, {regr,0}}},
684 {4, arg_r, 0}, /* regr */