Cross Reference: /src/external/gpl3/gdb/dist/opcodes/i386-dis.c

Lines Matching defs:modrm
208   modrm;
249   /* Record whether the modrm byte has been skipped.  */
368   ins->modrm.mod = (*ins->codep >> 6) & 3;
369   ins->modrm.reg = (*ins->codep >> 3) & 7;
370   ins->modrm.rm = *ins->codep & 7;
9041       dp = &reg_table[dp->op[1].bytemode][ins->modrm.reg];
9045       vindex = ins->modrm.mod == 0x3 ? 1 : 0;
9050       dp = &rm_table[dp->op[1].bytemode][ins->modrm.rm];
9144 	  if (ins->modrm.mod == 3)
9358       /* There is no MODRM byte for VEX0F 77.  */
9393       /* There is no MODRM byte for VEX 77.  */
9520       if (ins->modrm.mod == 3 && (ins->rex2 & REX_X))
9526       if (ins->modrm.mod == 3 && ins->vex.b && ins->evex_type != evex_from_legacy)
9564   /* If modrm.mod == 3, operand must be register.  */
9567       && ins->modrm.mod != 3
9568       && ins->modrm.rm == 4)
10003 	  if (ins.modrm.mod == 3 && ins.vex.b && ins.evex_type == evex_default
10707   if (ins->modrm.mod != 3)
10709       int fp_indx = (floatop - 0xd8) * 8 + ins->modrm.reg;
10720   dp = &float_reg[floatop - 0xd8][ins->modrm.reg];
10723       putop (ins, fgrps[dp->op[0].bytemode][ins->modrm.rm], sizeflag);
10761   int res = snprintf (scratch, ARRAY_SIZE (scratch), "%%st(%d)", ins->modrm.rm);
10837 	  if ((ins->need_modrm && ins->modrm.mod != 3 && !ins->vex.nd)
10932 	  if (ins->modrm.mod == 3)
10954 		  if (ins->modrm.mod != 3)
10960 		      || (ins->modrm.mod == 3 && (ins->rex & REX_X))
11168 	      if ((ins->modrm.mod == 3 || !cond)
11212 	      if ((ins->need_modrm && ins->modrm.mod != 3 && !ins->vex.nd)
11231 	      if (cond ? ins->modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)
11414 		  || ((ins->modrm.mod == 3 || ins->vex.b)
11438 	      ins->modrm.mod = 3;
11447 		  || ((ins->modrm.mod == 3 || ins->vex.b)
12131   if (ins->modrm.mod != 3)
12279       base = ins->modrm.rm;
12356       switch (ins->modrm.mod)
12416 	if (ins->modrm.mod != 0 || base == 5)
12485 	      && (disp || ins->modrm.mod != 0 || base == 5))
12500 	      int modrm_reg = ins->modrm.reg;
12512 	  if (ins->modrm.mod != 0 || base == 5)
12539       switch (ins->modrm.mod)
12542 	  if (ins->modrm.rm == 6)
12558 	if (ins->modrm.mod != 0 || ins->modrm.rm == 6)
12561       if (ins->modrm.mod != 0 || ins->modrm.rm != 6)
12564 	  oappend (ins, ins->intel_syntax ? intel_index16[ins->modrm.rm]
12565 					  : att_index16[ins->modrm.rm]);
12567 	      && (disp || ins->modrm.mod != 0 || ins->modrm.rm == 6))
12675   if (ins->modrm.mod == 3)
12683       print_register (ins, ins->modrm.rm, REX_B, bytemode, sizeflag);
12699   if (ins->modrm.mod == 3 && bytemode == f_mode)
12710   print_register (ins, ins->modrm.reg, REX_R, bytemode, sizeflag);
13002       oappend_register (ins, att_names_seg[ins->modrm.reg]);
13005   return OP_E (ins, ins->modrm.mod == 3 ? bytemode : w_mode, sizeflag);
13197 		  ins->modrm.reg + add);
13218 		  ins->modrm.reg + add);
13232   res = snprintf (scratch, ARRAY_SIZE (scratch), "%%tr%d", ins->modrm.reg);
13243   int reg = ins->modrm.reg;
13339   unsigned int reg = ins->modrm.reg;
13351     ins->modrm.reg = reg;
13365   if (ins->modrm.mod != 3)
13383   reg = ins->modrm.rm;
13405   if (ins->modrm.mod != 3)
13419   oappend_register (ins, att_names_mm[ins->modrm.rm]);
13428   oappend_register (ins, att_names_mm[ins->modrm.reg]);
13444   if (ins->modrm.mod != 3)
13447   reg = ins->modrm.rm;
13469     ins->modrm.rm = reg;
13478   if (ins->modrm.mod != 3)
13506   if (ins->modrm.mod == 3)
13507     /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
13519   if (ins->modrm.mod != 3 || ins->modrm.rm != 0)
13524 /* montmul instruction need display repz and skip modrm */
13529   if (ins->modrm.mod != 3 || ins->modrm.rm != 0)
13642       /* Since a variable sized ins->modrm/ins->sib chunk is between the start
13644 	 all the ins->modrm processing first, and don't know until now that
13860   if (ins->modrm.mod != 3
13879   if (ins->modrm.mod != 3)
13896   if (ins->modrm.mod != 3
14017       modrm_reg = ins->modrm.reg;
14021       if (ins->has_sib && ins->modrm.rm == 4)
14047 	  if (reg == ins->modrm.reg || reg == ins->modrm.rm)
14051       if (ins->modrm.reg == ins->modrm.rm || ins->modrm.reg == reg
14052 	  || ins->modrm.rm == reg)
14054 	  if (ins->modrm.reg <= 8
14055 	      && (ins->modrm.reg == ins->modrm.rm || ins->modrm.reg == reg))
14057 	  if (ins->modrm.rm <= 8
14058 	      && (ins->modrm.rm == ins->modrm.reg || ins->modrm.rm == reg))
14143   if (ins->modrm.mod == 3)
14386   unsigned int modrm_reg = ins->modrm.reg;
14387   unsigned int modrm_rm = ins->modrm.rm;
14402   if (ins->modrm.mod == 3)
14413       || (ins->modrm.mod == 3
14425   if (ins->modrm.mod != 3 || !ins->vex.b)
14451   if (ins->modrm.mod != 0 || ins->modrm.rm != 5)
14480   if (ins->modrm.mod != 3)
14485   unsigned int rm_reg = ins->modrm.rm + (ins->rex & REX_B ? 8 : 0)
14490       || (!ins->modrm.reg
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