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Lines Matching defs:v_mode

429 #define Ev { OP_E, v_mode }
451 #define Mv { OP_M, v_mode }
459 #define Gv { OP_G, v_mode }
469 #define Iv { OP_I, v_mode }
470 #define sIv { OP_sI, v_mode }
471 #define Iv64 { OP_I64, v_mode }
476 #define Jv { OP_J, v_mode }
517 #define Sv { OP_SEG, v_mode }
520 #define Ov { OP_OFF64, v_mode }
544 #define EM { OP_EM, v_mode }
596 #define VexGv { OP_VEX, v_mode }
632 #define Evh1 { HLE_Fixup1, v_mode }
634 #define Evh2 { HLE_Fixup2, v_mode }
636 #define Evh3 { HLE_Fixup3, v_mode }
658   v_mode,
720   /* pair of v_mode operands */
730   /* Displacements like v_mode without considering Intel64 ISA.  */
739   /* v_mode for indirect branch opcodes.  */
741   /* v_mode for stack-related opcodes.  */
2139   { "mov%LS",		{ { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, PREFIX_REX2_ILLEGAL },
11703     case v_mode:
11975       bytemode = v_mode;
11977     case v_mode:
11983       else if (bytemode != v_mode && bytemode != v_swap_mode)
12835     case v_mode:
12880   if (bytemode != v_mode || ins->address_mode != mode_64bit
12927     case v_mode:
12959 v_mode:
13131 	  intel_operand_size (ins, v_mode, sizeflag);
13161 	  intel_operand_size (ins, v_mode, sizeflag);
13368 	  && (bytemode == v_mode || bytemode == v_swap_mode))
13407       if (ins->intel_syntax && bytemode == v_mode)
14064     case v_mode:
14068       else if (bytemode == v_mode
14471       bytemode = v_mode;
14543       return OP_G (ins, v_mode, sizeflag);
14551     return OP_G (ins, v_mode, sizeflag);
14552   return OP_E (ins, v_mode, sizeflag);