Lines Matching defs:iw0
71 bu16 iw0, iw1;
76 iw0 = IFETCH (PCREG);
78 iw2 = ((bu32)iw0 << 16) | iw1;
81 if ((iw0 & 0xc000) == 0xc000)
84 sim_io_eprintf (sd, "%04x", iw0);
1761 decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
1767 int poprnd = ((iw0 >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask);
1768 int prgfunc = ((iw0 >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask);
2000 decode_CaCTRL_0 (SIM_CPU *cpu, bu16 iw0)
2006 int a = ((iw0 >> CaCTRL_a_bits) & CaCTRL_a_mask);
2007 int op = ((iw0 >> CaCTRL_op_bits) & CaCTRL_op_mask);
2008 int reg = ((iw0 >> CaCTRL_reg_bits) & CaCTRL_reg_mask);
2047 decode_PushPopReg_0 (SIM_CPU *cpu, bu16 iw0)
2053 int W = ((iw0 >> PushPopReg_W_bits) & PushPopReg_W_mask);
2054 int grp = ((iw0 >> PushPopReg_grp_bits) & PushPopReg_grp_mask);
2055 int reg = ((iw0 >> PushPopReg_reg_bits) & PushPopReg_reg_mask);
2107 decode_PushPopMultiple_0 (SIM_CPU *cpu, bu16 iw0)
2113 int p = ((iw0 >> PushPopMultiple_p_bits) & PushPopMultiple_p_mask);
2114 int d = ((iw0 >> PushPopMultiple_d_bits) & PushPopMultiple_d_mask);
2115 int W = ((iw0 >> PushPopMultiple_W_bits) & PushPopMultiple_W_mask);
2116 int dr = ((iw0 >> PushPopMultiple_dr_bits) & PushPopMultiple_dr_mask);
2117 int pr = ((iw0 >> PushPopMultiple_pr_bits) & PushPopMultiple_pr_mask);
2188 decode_ccMV_0 (SIM_CPU *cpu, bu16 iw0)
2194 int s = ((iw0 >> CCmv_s_bits) & CCmv_s_mask);
2195 int d = ((iw0 >> CCmv_d_bits) & CCmv_d_mask);
2196 int T = ((iw0 >> CCmv_T_bits) & CCmv_T_mask);
2197 int src = ((iw0 >> CCmv_src_bits) & CCmv_src_mask);
2198 int dst = ((iw0 >> CCmv_dst_bits) & CCmv_dst_mask);
2216 decode_CCflag_0 (SIM_CPU *cpu, bu16 iw0)
2222 int x = ((iw0 >> CCflag_x_bits) & CCflag_x_mask);
2223 int y = ((iw0 >> CCflag_y_bits) & CCflag_y_mask);
2224 int I = ((iw0 >> CCflag_I_bits) & CCflag_I_mask);
2225 int G = ((iw0 >> CCflag_G_bits) & CCflag_G_mask);
2226 int opc = ((iw0 >> CCflag_opc_bits) & CCflag_opc_mask);
2343 decode_CC2dreg_0 (SIM_CPU *cpu, bu16 iw0)
2349 int op = ((iw0 >> CC2dreg_op_bits) & CC2dreg_op_mask);
2350 int reg = ((iw0 >> CC2dreg_reg_bits) & CC2dreg_reg_mask);
2381 decode_CC2stat_0 (SIM_CPU *cpu, bu16 iw0)
2387 int D = ((iw0 >> CC2stat_D_bits) & CC2stat_D_mask);
2388 int op = ((iw0 >> CC2stat_op_bits) & CC2stat_op_mask);
2389 int cbit = ((iw0 >> CC2stat_cbit_bits) & CC2stat_cbit_mask);
2431 decode_BRCC_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
2437 int B = ((iw0 >> BRCC_B_bits) & BRCC_B_mask);
2438 int T = ((iw0 >> BRCC_T_bits) & BRCC_T_mask);
2439 int offset = ((iw0 >> BRCC_offset_bits) & BRCC_offset_mask);
2470 decode_UJUMP_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
2476 int offset = ((iw0 >> UJump_offset_bits) & UJump_offset_mask);
2498 decode_REGMV_0 (SIM_CPU *cpu, bu16 iw0)
2504 int gs = ((iw0 >> RegMv_gs_bits) & RegMv_gs_mask);
2505 int gd = ((iw0 >> RegMv_gd_bits) & RegMv_gd_mask);
2506 int src = ((iw0 >> RegMv_src_bits) & RegMv_src_mask);
2507 int dst = ((iw0 >> RegMv_dst_bits) & RegMv_dst_mask);
2556 decode_ALU2op_0 (SIM_CPU *cpu, bu16 iw0)
2562 int src = ((iw0 >> ALU2op_src_bits) & ALU2op_src_mask);
2563 int opc = ((iw0 >> ALU2op_opc_bits) & ALU2op_opc_mask);
2564 int dst = ((iw0 >> ALU2op_dst_bits) & ALU2op_dst_mask);
2665 decode_PTR2op_0 (SIM_CPU *cpu, bu16 iw0)
2671 int src = ((iw0 >> PTR2op_src_bits) & PTR2op_dst_mask);
2672 int opc = ((iw0 >> PTR2op_opc_bits) & PTR2op_opc_mask);
2673 int dst = ((iw0 >> PTR2op_dst_bits) & PTR2op_dst_mask);
2723 decode_LOGI2op_0 (SIM_CPU *cpu, bu16 iw0)
2729 int src = ((iw0 >> LOGI2op_src_bits) & LOGI2op_src_mask);
2730 int opc = ((iw0 >> LOGI2op_opc_bits) & LOGI2op_opc_mask);
2731 int dst = ((iw0 >> LOGI2op_dst_bits) & LOGI2op_dst_mask);
2801 decode_COMP3op_0 (SIM_CPU *cpu, bu16 iw0)
2807 int opc = ((iw0 >> COMP3op_opc_bits) & COMP3op_opc_mask);
2808 int dst = ((iw0 >> COMP3op_dst_bits) & COMP3op_dst_mask);
2809 int src0 = ((iw0 >> COMP3op_src0_bits) & COMP3op_src0_mask);
2810 int src1 = ((iw0 >> COMP3op_src1_bits) & COMP3op_src1_mask);
2867 decode_COMPI2opD_0 (SIM_CPU *cpu, bu16 iw0)
2873 int op = ((iw0 >> COMPI2opD_op_bits) & COMPI2opD_op_mask);
2874 int dst = ((iw0 >> COMPI2opD_dst_bits) & COMPI2opD_dst_mask);
2875 int src = ((iw0 >> COMPI2opD_src_bits) & COMPI2opD_src_mask);
2898 decode_COMPI2opP_0 (SIM_CPU *cpu, bu16 iw0)
2904 int op = ((iw0 >> COMPI2opP_op_bits) & COMPI2opP_op_mask);
2905 int src = ((iw0 >> COMPI2opP_src_bits) & COMPI2opP_src_mask);
2906 int dst = ((iw0 >> COMPI2opP_dst_bits) & COMPI2opP_dst_mask);
2930 decode_LDSTpmod_0 (SIM_CPU *cpu, bu16 iw0)
2936 int W = ((iw0 >> LDSTpmod_W_bits) & LDSTpmod_W_mask);
2937 int aop = ((iw0 >> LDSTpmod_aop_bits) & LDSTpmod_aop_mask);
2938 int idx = ((iw0 >> LDSTpmod_idx_bits) & LDSTpmod_idx_mask);
2939 int ptr = ((iw0 >> LDSTpmod_ptr_bits) & LDSTpmod_ptr_mask);
2940 int reg = ((iw0 >> LDSTpmod_reg_bits) & LDSTpmod_reg_mask);
3052 decode_dagMODim_0 (SIM_CPU *cpu, bu16 iw0)
3058 int i = ((iw0 >> DagMODim_i_bits) & DagMODim_i_mask);
3059 int m = ((iw0 >> DagMODim_m_bits) & DagMODim_m_mask);
3060 int br = ((iw0 >> DagMODim_br_bits) & DagMODim_br_mask);
3061 int op = ((iw0 >> DagMODim_op_bits) & DagMODim_op_mask);
3089 decode_dagMODik_0 (SIM_CPU *cpu, bu16 iw0)
3095 int i = ((iw0 >> DagMODik_i_bits) & DagMODik_i_mask);
3096 int op = ((iw0 >> DagMODik_op_bits) & DagMODik_op_mask);
3129 decode_dspLDST_0 (SIM_CPU *cpu, bu16 iw0)
3135 int i = ((iw0 >> DspLDST_i_bits) & DspLDST_i_mask);
3136 int m = ((iw0 >> DspLDST_m_bits) & DspLDST_m_mask);
3137 int W = ((iw0 >> DspLDST_W_bits) & DspLDST_W_mask);
3138 int aop = ((iw0 >> DspLDST_aop_bits) & DspLDST_aop_mask);
3139 int reg = ((iw0 >> DspLDST_reg_bits) & DspLDST_reg_mask);
3292 decode_LDST_0 (SIM_CPU *cpu, bu16 iw0)
3298 int Z = ((iw0 >> LDST_Z_bits) & LDST_Z_mask);
3299 int W = ((iw0 >> LDST_W_bits) & LDST_W_mask);
3300 int sz = ((iw0 >> LDST_sz_bits) & LDST_sz_mask);
3301 int aop = ((iw0 >> LDST_aop_bits) & LDST_aop_mask);
3302 int reg = ((iw0 >> LDST_reg_bits) & LDST_reg_mask);
3303 int ptr = ((iw0 >> LDST_ptr_bits) & LDST_ptr_mask);
3385 decode_LDSTiiFP_0 (SIM_CPU *cpu, bu16 iw0)
3393 int grp = ((iw0 >> 3) & 0x1);
3394 int reg = ((iw0 >> LDSTiiFP_reg_bits) & 0x7 /*LDSTiiFP_reg_mask*/);
3395 int offset = ((iw0 >> LDSTiiFP_offset_bits) & LDSTiiFP_offset_mask);
3396 int W = ((iw0 >> LDSTiiFP_W_bits) & LDSTiiFP_W_mask);
3423 decode_LDSTii_0 (SIM_CPU *cpu, bu16 iw0)
3429 int reg = ((iw0 >> LDSTii_reg_bit) & LDSTii_reg_mask);
3430 int ptr = ((iw0 >> LDSTii_ptr_bit) & LDSTii_ptr_mask);
3431 int offset = ((iw0 >> LDSTii_offset_bit) & LDSTii_offset_mask);
3432 int op = ((iw0 >> LDSTii_op_bit) & LDSTii_op_mask);
3433 int W = ((iw0 >> LDSTii_W_bit) & LDSTii_W_mask);
3502 decode_LoopSetup_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1, bu32 pc)
3509 int c = ((iw0 >> (LoopSetup_c_bits - 16)) & LoopSetup_c_mask);
3511 int rop = ((iw0 >> (LoopSetup_rop_bits - 16)) & LoopSetup_rop_mask);
3512 int soffset = ((iw0 >> (LoopSetup_soffset_bits - 16)) & LoopSetup_soffset_mask);
3553 decode_LDIMMhalf_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
3560 int H = ((iw0 >> (LDIMMhalf_H_bits - 16)) & LDIMMhalf_H_mask);
3561 int Z = ((iw0 >> (LDIMMhalf_Z_bits - 16)) & LDIMMhalf_Z_mask);
3562 int S = ((iw0 >> (LDIMMhalf_S_bits - 16)) & LDIMMhalf_S_mask);
3563 int reg = ((iw0 >> (LDIMMhalf_reg_bits - 16)) & LDIMMhalf_reg_mask);
3564 int grp = ((iw0 >> (LDIMMhalf_grp_bits - 16)) & LDIMMhalf_grp_mask);
3607 decode_CALLa_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1, bu32 pc)
3614 int S = ((iw0 >> (CALLa_S_bits - 16)) & CALLa_S_mask);
3616 int msw = ((iw0 >> 0) & 0xff);
3644 decode_LDSTidxI_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
3651 int Z = ((iw0 >> (LDSTidxI_Z_bits - 16)) & LDSTidxI_Z_mask);
3652 int W = ((iw0 >> (LDSTidxI_W_bits - 16)) & LDSTidxI_W_mask);
3653 int sz = ((iw0 >> (LDSTidxI_sz_bits - 16)) & LDSTidxI_sz_mask);
3654 int reg = ((iw0 >> (LDSTidxI_reg_bits - 16)) & LDSTidxI_reg_mask);
3655 int ptr = ((iw0 >> (LDSTidxI_ptr_bits - 16)) & LDSTidxI_ptr_mask);
3741 decode_linkage_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
3748 int R = ((iw0 >> (Linkage_R_bits - 16)) & Linkage_R_mask);
3788 decode_dsp32mac_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
3795 int op1 = ((iw0 >> (DSP32Mac_op1_bits - 16)) & DSP32Mac_op1_mask);
3796 int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask);
3797 int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask);
3798 int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask);
3799 int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask);
3800 int M = ((iw0 >> (DSP32Mac_M_bits - 16)) & DSP32Mac_M_mask);
3949 decode_dsp32mult_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
3956 int op1 = ((iw0 >> (DSP32Mac_op1_bits - 16)) & DSP32Mac_op1_mask);
3957 int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask);
3958 int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask);
3959 int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask);
3960 int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask);
3961 int M = ((iw0 >> (DSP32Mac_M_bits - 16)) & DSP32Mac_M_mask);
4058 decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
4072 int M = ((iw0 >> (DSP32Alu_M_bits - 16)) & DSP32Alu_M_mask);
4073 int HL = ((iw0 >> (DSP32Alu_HL_bits - 16)) & DSP32Alu_HL_mask);
4074 int aopcde = ((iw0 >> (DSP32Alu_aopcde_bits - 16)) & DSP32Alu_aopcde_mask);
5223 decode_dsp32shift_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
5235 int sopcde = ((iw0 >> (DSP32Shift_sopcde_bits - 16)) & DSP32Shift_sopcde_mask);
5236 int M = ((iw0 >> (DSP32Shift_M_bits - 16)) & DSP32Shift_M_mask);
5821 decode_dsp32shiftimm_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
5834 int M = ((iw0 >> (DSP32ShiftImm_M_bits - 16)) & DSP32ShiftImm_M_mask);
5835 int sopcde = ((iw0 >> (DSP32ShiftImm_sopcde_bits - 16)) & DSP32ShiftImm_sopcde_mask);
6152 decode_psedoDEBUG_0 (SIM_CPU *cpu, bu16 iw0)
6159 int fn = ((iw0 >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask);
6160 int grp = ((iw0 >> PseudoDbg_grp_bits) & PseudoDbg_grp_mask);
6161 int reg = ((iw0 >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask);
6209 decode_psedoOChar_0 (SIM_CPU *cpu, bu16 iw0)
6215 int ch = ((iw0 >> PseudoChr_ch_bits) & PseudoChr_ch_mask);
6225 decode_psedodbg_assert_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1, bu32 pc)
6234 int dbgop = ((iw0 >> (PseudoDbg_Assert_dbgop_bits - 16)) & PseudoDbg_Assert_dbgop_mask);
6235 int grp = ((iw0 >> (PseudoDbg_Assert_grp_bits - 16)) & PseudoDbg_Assert_grp_mask);
6236 int regtest = ((iw0 >> (PseudoDbg_Assert_regtest_bits - 16)) & PseudoDbg_Assert_regtest_mask);
6305 bu16 iw0, iw1;
6308 iw0 = IFETCH (pc);
6309 if ((iw0 & 0xc000) != 0xc000)
6316 TRACE_EXTRACT (cpu, "%s: iw0:%#x", __func__, iw0);
6317 if ((iw0 & 0xFF00) == 0x0000)
6318 decode_ProgCtrl_0 (cpu, iw0, pc);
6319 else if ((iw0 & 0xFFC0) == 0x0240)
6320 decode_CaCTRL_0 (cpu, iw0);
6321 else if ((iw0 & 0xFF80) == 0x0100)
6322 decode_PushPopReg_0 (cpu, iw0);
6323 else if ((iw0 & 0xFE00) == 0x0400)
6324 decode_PushPopMultiple_0 (cpu, iw0);
6325 else if ((iw0 & 0xFE00) == 0x0600)
6326 decode_ccMV_0 (cpu, iw0);
6327 else if ((iw0 & 0xF800) == 0x0800)
6328 decode_CCflag_0 (cpu, iw0);
6329 else if ((iw0 & 0xFFE0) == 0x0200)
6330 decode_CC2dreg_0 (cpu, iw0);
6331 else if ((iw0 & 0xFF00) == 0x0300)
6332 decode_CC2stat_0 (cpu, iw0);
6333 else if ((iw0 & 0xF000) == 0x1000)
6334 decode_BRCC_0 (cpu, iw0, pc);
6335 else if ((iw0 & 0xF000) == 0x2000)
6336 decode_UJUMP_0 (cpu, iw0, pc);
6337 else if ((iw0 & 0xF000) == 0x3000)
6338 decode_REGMV_0 (cpu, iw0);
6339 else if ((iw0 & 0xFC00) == 0x4000)
6340 decode_ALU2op_0 (cpu, iw0);
6341 else if ((iw0 & 0xFE00) == 0x4400)
6342 decode_PTR2op_0 (cpu, iw0);
6343 else if ((iw0 & 0xF800) == 0x4800)
6344 decode_LOGI2op_0 (cpu, iw0);
6345 else if ((iw0 & 0xF000) == 0x5000)
6346 decode_COMP3op_0 (cpu, iw0);
6347 else if ((iw0 & 0xF800) == 0x6000)
6348 decode_COMPI2opD_0 (cpu, iw0);
6349 else if ((iw0 & 0xF800) == 0x6800)
6350 decode_COMPI2opP_0 (cpu, iw0);
6351 else if ((iw0 & 0xF000) == 0x8000)
6352 decode_LDSTpmod_0 (cpu, iw0);
6353 else if ((iw0 & 0xFF60) == 0x9E60)
6354 decode_dagMODim_0 (cpu, iw0);
6355 else if ((iw0 & 0xFFF0) == 0x9F60)
6356 decode_dagMODik_0 (cpu, iw0);
6357 else if ((iw0 & 0xFC00) == 0x9C00)
6358 decode_dspLDST_0 (cpu, iw0);
6359 else if ((iw0 & 0xF000) == 0x9000)
6360 decode_LDST_0 (cpu, iw0);
6361 else if ((iw0 & 0xFC00) == 0xB800)
6362 decode_LDSTiiFP_0 (cpu, iw0);
6363 else if ((iw0 & 0xE000) == 0xA000)
6364 decode_LDSTii_0 (cpu, iw0);
6375 if ((iw0 & BIT_MULTI_INS) && (iw0 & 0xe800) != 0xe800 /* not linkage */)
6386 TRACE_EXTRACT (cpu, "%s: iw0:%#x iw1:%#x insn_len:%i", __func__,
6387 iw0, iw1, insn_len);
6396 if ((iw0 & 0xf7ff) == 0xc003 && (iw1 & 0xfe00) == 0x1800)
6401 else if (((iw0 & 0xFF80) == 0xE080) && ((iw1 & 0x0C00) == 0x0000))
6402 iw0, iw1, pc);
6403 else if (((iw0 & 0xFF00) == 0xE100) && ((iw1 & 0x0000) == 0x0000))
6404 decode_LDIMMhalf_0 (cpu, iw0, iw1);
6405 else if (((iw0 & 0xFE00) == 0xE200) && ((iw1 & 0x0000) == 0x0000))
6406 decode_CALLa_0 (cpu, iw0, iw1, pc);
6407 else if (((iw0 & 0xFC00) == 0xE400) && ((iw1 & 0x0000) == 0x0000))
6408 decode_LDSTidxI_0 (cpu, iw0, iw1);
6409 else if (((iw0 & 0xFFFE) == 0xE800) && ((iw1 & 0x0000) == 0x0000))
6410 decode_linkage_0 (cpu, iw0, iw1);
6411 else if (((iw0 & 0xF600) == 0xC000) && ((iw1 & 0x0000) == 0x0000))
6412 decode_dsp32mac_0 (cpu, iw0, iw1);
6413 else if (((iw0 & 0xF600) == 0xC200) && ((iw1 & 0x0000) == 0x0000))
6414 decode_dsp32mult_0 (cpu, iw0, iw1);
6415 else if (((iw0 & 0xF7C0) == 0xC400) && ((iw1 & 0x0000) == 0x0000))
6416 decode_dsp32alu_0 (cpu, iw0, iw1);
6417 else if (((iw0 & 0xF7E0) == 0xC600) && ((iw1 & 0x01C0) == 0x0000))
6418 decode_dsp32shift_0 (cpu, iw0, iw1);
6419 else if (((iw0 & 0xF7E0) == 0xC680) && ((iw1 & 0x0000) == 0x0000))
6420 decode_dsp32shiftimm_0 (cpu, iw0, iw1);
6421 else if ((iw0 & 0xFF00) == 0xF800)
6422 decode_psedoDEBUG_0 (cpu, iw0), insn_len = 2;
6423 else if ((iw0 & 0xFF00) == 0xF900)
6424 decode_psedoOChar_0 (cpu, iw0), insn_len = 2;
6425 else if (((iw0 & 0xFF00) == 0xF000) && ((iw1 & 0x0000) == 0x0000))
6426 decode_psedodbg_assert_0 (cpu, iw0, iw1, pc);
Indexes created Sat Mar 21 00:23:06 UTC 2026