Lines Matching refs:src0
1334 /* Perform a multiplication of D registers SRC0 and SRC1, sign- or
1339 decode_multfunc (SIM_CPU *cpu, int h0, int h1, int src0, int src1, int mmod,
1342 bu32 s0 = DREG (src0), s1 = DREG (src1);
1584 decode_macfunc (SIM_CPU *cpu, int which, int op, int h0, int h1, int src0,
1605 bu64 res = decode_multfunc (cpu, h0, h1, src0, src1, mmod,
2805 | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......|
2809 int src0 = ((iw0 >> COMP3op_src0_bits) & COMP3op_src0_mask);
2813 TRACE_EXTRACT (cpu, "%s: opc:%i dst:%i src1:%i src0:%i",
2814 __func__, opc, dst, src1, src0);
2821 TRACE_INSN (cpu, "R%i = R%i + R%i;", dst, src0, src1);
2822 SET_DREG (dst, add32 (cpu, DREG (src0), DREG (src1), 1, 0));
2826 TRACE_INSN (cpu, "R%i = R%i - R%i;", dst, src0, src1);
2827 SET_DREG (dst, sub32 (cpu, DREG (src0), DREG (src1), 1, 0, 0));
2831 TRACE_INSN (cpu, "R%i = R%i & R%i;", dst, src0, src1);
2832 SET_DREG (dst, DREG (src0) & DREG (src1));
2837 TRACE_INSN (cpu, "R%i = R%i | R%i;", dst, src0, src1);
2838 SET_DREG (dst, DREG (src0) | DREG (src1));
2843 TRACE_INSN (cpu, "R%i = R%i ^ R%i;", dst, src0, src1);
2844 SET_DREG (dst, DREG (src0) ^ DREG (src1));
2851 const char *src0_name = get_preg_name (src0);
2854 /* If src0 == src1 this is disassembled as a shift by 1, but this
2862 SET_PREG (dst, PREG (src0) + (PREG (src1) << shift));
3793 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..|
3802 int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask);
3820 "w0:%i op0:%i h00:%i h10:%i dst:%i src0:%i src1:%i",
3822 dst, src0, src1);
3836 bu32 res1 = decode_macfunc (cpu, 1, op1, h01, h11, src0,
3852 src0, h01 ? 'H' : 'L',
3884 bu32 res0 = decode_macfunc (cpu, 0, op0, h00, h10, src0,
3900 src0, h00 ? 'H' : 'L',
3954 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..|
3963 int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask);
3979 "w0:%i op0:%i h00:%i h10:%i dst:%i src0:%i src1:%i",
3981 dst, src0, src1);
3995 bu64 r = decode_multfunc (cpu, h01, h11, src0, src1, mmod, MM, &sat1);
4000 src0, h01 ? 'H' : 'L',
4023 bu64 r = decode_multfunc (cpu, h00, h10, src0, src1, mmod, 0, &sat0);
4028 src0, h01 ? 'H' : 'L',
4063 |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......|
4068 int src0 = ((iw1 >> DSP32Alu_src0_bits) & DSP32Alu_src0_mask);
4078 "dst1:%i src0:%i src1:%i",
4079 __func__, M, HL, aopcde, aop, s, x, dst0, dst1, src0, src1);
4084 TRACE_INSN (cpu, "A%i.L = R%i.L;", a, src0);
4085 SET_AWREG (a, REG_H_L (AWREG (a), DREG (src0)));
4090 TRACE_INSN (cpu, "A%i.H = R%i.H;", a, src0);
4091 SET_AWREG (a, REG_H_L (DREG (src0), AWREG (a)));
4095 bs32 val0 = DREG (src0);
4102 src0, aop & 0x1 ? "-" : "+", src1);
4172 bs32 val0 = DREG (src0);
4177 src0, aop & 0x1 ? "-" : "+", src1);
4205 src0, aop & 2 ? 'H' : 'L',
4210 s1 = DREG (src0);
4238 TRACE_INSN (cpu, "A%i = R%i;", a, src0);
4239 SET_AREG32 (a, DREG (src0));
4244 TRACE_INSN (cpu, "A%i.X = R%i.L;", a, src0);
4245 SET_AXREG (a, (bs8)DREG (src0));
4287 src0 + 1, src0, src1 + 1, src1, opts[HL + (aop << 1)],
4290 if ((src1 != 0 && src1 != 2) || (src0 != 0 && src0 != 2))
4293 s0L = DREG (src0);
4294 s0H = DREG (src0 + 1);
4412 src0 + 1, src0, src1 + 1, src1, HL ? "HI" : "LO",
4415 if ((src1 != 0 && src1 != 2) || (src0 != 0 && src0 != 2))
4418 s0L = DREG (src0);
4419 s0H = DREG (src0 + 1);
4464 bs32 res = DREG (src0);
4468 TRACE_INSN (cpu, "R%i.%s = R%i (RND);", dst0, HL == 0 ? "L" : "H", src0);
4470 HL == 0 ? "L" : "H", src0, res);
4505 bu32 hi = (-(bs16)(DREG (src0) >> 16)) << 16;
4506 bu32 lo = (-(bs16)(DREG (src0) & 0xFFFF)) & 0xFFFF;
4509 TRACE_INSN (cpu, "R%i = -R%i (V);", dst0, src0);
4574 bs16 tmp0_hi = DREG (src0) >> 16;
4575 bs16 tmp0_lo = DREG (src0);
4580 dst0, dst0, src0, src1, src0, src1);
4594 bu32 s0 = DREG (src0);
4603 TRACE_INSN (cpu, "R%i = R%i %c|%c R%i%s;", dst0, src0,
4648 bu16 s0L = DREG (src0);
4649 bu16 s0H = DREG (src0) >> 16;
4655 dst1, src0, HL ? "+|-" : "+|+", src1,
4656 dst0, src0, HL ? "-|+" : "-|-", src1,
4780 TRACE_INSN (cpu, "R%i = R%i + R%i%s;", dst0, src0, src1, amod1 (s, x));
4781 SET_DREG (dst0, add32 (cpu, DREG (src0), DREG (src1), 1, s));
4785 TRACE_INSN (cpu, "R%i = R%i - R%i%s;", dst0, src0, src1, amod1 (s, x));
4786 SET_DREG (dst0, sub32 (cpu, DREG (src0), DREG (src1), 1, s, 0));
4791 dst1, src0, src1, dst0, src0, src1, amod1 (s, x));
4796 STORE (DREG (dst1), add32 (cpu, DREG (src0), DREG (src1), 1, s));
4797 STORE (DREG (dst0), sub32 (cpu, DREG (src0), DREG (src1), 1, s, 1));
4850 bu32 s0L = DREG (src0);
4851 bu32 s0H = DREG (src0 + 1);
4858 if (!((src0 == 0 || src0 == 2) && (src1 == 0 || src1 == 2)))
4861 TRACE_INSN (cpu, "SAA (R%i:%i, R%i:%i)%s", src0 + 1, src0,
4916 src0 + 1, src0, src1 + 1, src1, opts[s + (aop << 1)]);
4918 if ((src1 != 0 && src1 != 2) || (src0 != 0 && src0 != 2))
4921 s0L = DREG (src0);
4922 s0H = DREG (src0 + 1);
4950 src0 + 1, src0, src1 + 1, src1, s ? " (R)" : "");
4952 if ((src1 != 0 && src1 != 2) || (src0 != 0 && src0 != 2))
4958 s0L = DREG (src0);
4959 s0H = DREG (src0 + 1);
4988 src0 + 1, src0, src1 + 1, src1, s ? " (R)" : "");
4990 if ((src1 != 0 && src1 != 2) || (src0 != 0 && src0 != 2))
4996 s0L = DREG (src0);
4997 s0H = DREG (src0 + 1);
5023 TRACE_INSN (cpu, "R%i = MIN (R%i, R%i);", dst0, src0, src1);
5024 SET_DREG (dst0, min32 (cpu, DREG (src0), DREG (src1)));
5028 TRACE_INSN (cpu, "R%i = MAX (R%i, R%i);", dst0, src0, src1);
5029 SET_DREG (dst0, max32 (cpu, DREG (src0), DREG (src1)));
5033 bu32 val = DREG (src0);
5036 TRACE_INSN (cpu, "R%i = ABS R%i;", dst0, src0);
5052 bu32 val = DREG (src0);
5054 TRACE_INSN (cpu, "R%i = - R%i%s;", dst0, src0, amod1 (s, 0));
5073 bu32 in = DREG (src0);
5078 TRACE_INSN (cpu, "R%i = ABS R%i (V);", dst0, src0);
5100 TRACE_INSN (cpu, "R%i = MIN (R%i, R%i) (V);", dst0, src0, src1);
5101 SET_DREG (dst0, min2x16 (cpu, DREG (src0), DREG (src1)));
5105 TRACE_INSN (cpu, "R%i = MAX (R%i, R%i) (V);", dst0, src0, src1);
5106 SET_DREG (dst0, max2x16 (cpu, DREG (src0), DREG (src1)));
5110 TRACE_INSN (cpu, "R%i = BYTEPACK (R%i, R%i);", dst0, src0, src1);
5112 (((DREG (src0) >> 0) & 0xff) << 0) |
5113 (((DREG (src0) >> 16) & 0xff) << 8) |
5127 dst1, dst0, src0 + 1, src0, s ? " (R)" : "");
5129 if ((src1 != 0 && src1 != 2) || (src0 != 0 && src0 != 2))
5137 hi = src0, lo = src0 + 1;
5139 hi = src0 + 1, lo = src0;
5158 dst1, dst0, src0, searchmodes[aop]);
5179 src_lo = DREG (src0);
5180 src_hi = DREG (src0) >> 16;
5228 |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......|
5232 int src0 = ((iw1 >> DSP32Shift_src0_bits) & DSP32Shift_src0_mask);
5239 TRACE_EXTRACT (cpu, "%s: M:%i sopcde:%i sop:%i HLs:%i dst0:%i src0:%i src1:%i",
5240 __func__, M, sopcde, sop, HLs, dst0, src0, src1);
5245 src0) << 2) >> 2;
5250 src0, sop == 1 ? " (S)" : "");
5280 bs32 shft = (bs8)(DREG (src0) << 2) >> 2;
5285 src1, HLs & 1 ? 'H' : 'L', src0);
5308 int shift = imm6 (DREG (src0) & 0xFFFF);
5312 TRACE_INSN (cpu, "A%i = ROT A%i BY R%i.L;", HLs, HLs, src0);
5322 bs32 shft = (bs8)(DREG (src0) << 2) >> 2;
5327 TRACE_INSN (cpu, "A%i = ASHIFT A%i BY R%i.L;", HLs, HLs, src0);
5341 bs32 shft = (bs8)(DREG (src0) << 2) >> 2;
5346 TRACE_INSN (cpu, "A%i = LSHIFT A%i BY R%i.L;", HLs, HLs, src0);
5363 bs32 shft = (bs8)(DREG (src0) << 2) >> 2;
5368 dst0, src1, src0, sop == 1 ? ",S" : "");
5403 bs32 shft = (bs8)(DREG (src0) << 2) >> 2;
5406 shft && sop != 2 ? 'A' : 'L', src1, src0,
5430 int shift = imm6 (DREG (src0) & 0xFFFF);
5434 TRACE_INSN (cpu, "R%i = ROT R%i BY R%i.L;", dst0, src1, src0);
5445 bs32 shft = (bs8)(DREG (src0) << 2) >> 2;
5449 TRACE_INSN (cpu, "R%i = LSHIFT R%i BY R%i.L (V);", dst0, src1, src0);
5471 bu32 sv0 = DREG (src0);
5475 src0, sop & 1 ? 'H' : 'L');
5517 bu16 sv0 = (bu16)DREG (src0);
5520 TRACE_INSN (cpu, "R%i.L = EXPADJ (R%i, R%i.L);", dst0, src1, src0);
5534 bu16 src0_lo = (DREG (src0) & 0xFFFF);
5537 TRACE_INSN (cpu, "R%i.L = EXPADJ (R%i, R%i.L) (V);", dst0, src1, src0);
5558 bu16 src0_lo = (bu16)(DREG (src0) & 0xFFFF);
5560 TRACE_INSN (cpu, "R%i.L = EXPADJ (R%i.L, R%i.L);", dst0, src1, src0);
5572 bu16 src0_lo = (bu16)(DREG (src0) & 0xFFFF);
5574 TRACE_INSN (cpu, "R%i.L = EXPADJ (R%i.H, R%i.L);", dst0, src1, src0);
5588 TRACE_INSN (cpu, "BITMUX (R%i, R%i, A0) (ASR);", src0, src1);
5590 if (src0 == src1)
5593 s0 = DREG (src0);
5598 STORE (DREG (src0), s0 >> 1);
5608 TRACE_INSN (cpu, "BITMUX (R%i, R%i, A0) (ASL);", src0, src1);
5610 if (src0 == src1)
5613 s0 = DREG (src0);
5618 STORE (DREG (src0), s0 << 1);
5656 dst0, src1, src0, sop & 1 ? 'R' : 'L');
5658 s0L = DREG (src0);
5659 s0H = DREG (src0) >> 16;
5689 bu32 v = DREG (src0);
5693 TRACE_INSN (cpu, "R%i = EXTRACT (R%i, R%i.L) (Z);", dst0, src1, src0);
5702 bu32 v = DREG (src0);
5707 TRACE_INSN (cpu, "R%i = EXTRACT (R%i, R%i.L) (X);", dst0, src1, src0);
5725 bu32 fg = DREG (src0);
5732 TRACE_INSN (cpu, "R%i = DEPOSIT (R%i, R%i)%s;", dst0, src1, src0,
5753 TRACE_INSN (cpu, "R%i.L = CC = BXORSHIFT (A0, R%i);", dst0, src0);
5756 SET_CCREG (xor_reduce (acc0, DREG (src0)));
5764 TRACE_INSN (cpu, "R%i.L = CC = BXOR (A0, R%i);", dst0, src0);
5766 SET_CCREG (xor_reduce (acc0, DREG (src0)));
5793 TRACE_INSN (cpu, "R%i = ALIGN%i (R%i, R%i);", dst0, shift, src1, src0);
5794 STORE (DREG (dst0), (DREG (src1) << (32 - shift)) | (DREG (src0) >> shift));
Indexes created Sun Aug 02 00:25:04 UTC 2026