Lines Matching refs:input_port
97 { "ppi@0", 0, 0, input_port, },
98 { "rsi", 1, 0, input_port, },
99 { "sport@0_rx", 2, 0, input_port, },
100 { "sport@0_tx", 3, 0, input_port, },
101 { "sport@1_tx", 4, 0, input_port, },
102 { "sport@1_rx", 5, 0, input_port, },
103 { "spi@0", 6, 0, input_port, },
104 { "spi@1", 7, 0, input_port, },
105 { "uart2@0_rx", 8, 0, input_port, },
106 { "uart2@0_tx", 9, 0, input_port, },
107 { "uart2@1_rx", 10, 0, input_port, },
108 { "uart2@1_tx", 11, 0, input_port, },
121 { "ppi@0", 0, 0, input_port, },
122 { "emac_rx", 1, 0, input_port, },
123 { "emac_tx", 2, 0, input_port, },
124 { "sport@0_rx", 3, 0, input_port, },
125 { "sport@0_tx", 4, 0, input_port, },
126 /*{ "rsi", 4, 0, input_port, },*/
127 { "sport@1_tx", 5, 0, input_port, },
128 /*{ "spi@1", 5, 0, input_port, },*/
129 { "sport@1_rx", 6, 0, input_port, },
130 { "spi@0", 7, 0, input_port, },
131 { "uart@0_rx", 8, 0, input_port, },
132 { "uart@0_tx", 9, 0, input_port, },
133 { "uart@1_rx", 10, 0, input_port, },
134 { "uart@1_tx", 11, 0, input_port, },
148 { "ppi@0", 0, 0, input_port, },
149 /*{ "nfc", 0, 0, input_port, },*/
150 { "emac_rx", 1, 0, input_port, },
151 /*{ "hostdp", 1, 0, input_port, },*/
152 { "emac_tx", 2, 0, input_port, },
153 /*{ "nfc", 2, 0, input_port, },*/
154 { "sport@0_tx", 3, 0, input_port, },
155 { "sport@0_rx", 4, 0, input_port, },
156 { "sport@1_tx", 5, 0, input_port, },
157 { "sport@1_rx", 6, 0, input_port, },
158 { "spi", 7, 0, input_port, },
159 { "uart@0_tx", 8, 0, input_port, },
160 { "uart@0_rx", 9, 0, input_port, },
161 { "uart@1_tx", 10, 0, input_port, },
162 { "uart@1_rx", 11, 0, input_port, },
174 { "ppi@0", 0, 0, input_port, },
175 { "sport@0_tx", 1, 0, input_port, },
176 { "sport@0_rx", 2, 0, input_port, },
177 { "sport@1_tx", 3, 0, input_port, },
178 { "sport@1_rx", 4, 0, input_port, },
179 { "spi", 5, 0, input_port, },
180 { "uart@0_tx", 6, 0, input_port, },
181 { "uart@0_rx", 7, 0, input_port, },
193 { "ppi@0", 0, 0, input_port, },
194 { "emac_rx", 1, 0, input_port, },
195 { "emac_tx", 2, 0, input_port, },
196 { "sport@0_tx", 3, 0, input_port, },
197 { "sport@0_rx", 4, 0, input_port, },
198 { "sport@1_tx", 5, 0, input_port, },
199 { "sport@1_rx", 6, 0, input_port, },
200 { "spi", 7, 0, input_port, },
201 { "uart@0_tx", 8, 0, input_port, },
202 { "uart@0_rx", 9, 0, input_port, },
203 { "uart@1_tx", 10, 0, input_port, },
204 { "uart@1_rx", 11, 0, input_port, },
216 { "ppi@0", 0, 0, input_port, },
217 { "sport@0_rx", 1, 0, input_port, },
218 { "sport@0_tx", 2, 0, input_port, },
219 { "sport@1_rx", 3, 0, input_port, },
220 { "sport@1_tx", 4, 0, input_port, },
221 { "spi@0", 5, 0, input_port, },
222 { "uart@0_rx", 6, 0, input_port, },
223 { "uart@0_tx", 7, 0, input_port, },
235 { "sport@2_rx", 0, 0, input_port, },
236 { "sport@2_tx", 1, 0, input_port, },
237 { "sport@3_rx", 2, 0, input_port, },
238 { "sport@3_tx", 3, 0, input_port, },
239 { "spi@1", 6, 0, input_port, },
240 { "spi@2", 7, 0, input_port, },
241 { "uart@1_rx", 8, 0, input_port, },
242 { "uart@1_tx", 9, 0, input_port, },
243 { "uart@2_rx", 10, 0, input_port, },
244 { "uart@2_tx", 11, 0, input_port, },
256 { "sport@0_rx", 0, 0, input_port, },
257 { "sport@0_tx", 1, 0, input_port, },
258 { "sport@1_rx", 2, 0, input_port, },
259 { "sport@1_tx", 3, 0, input_port, },
260 { "spi@0", 4, 0, input_port, },
261 { "spi@1", 5, 0, input_port, },
262 { "uart2@0_rx", 6, 0, input_port, },
263 { "uart2@0_tx", 7, 0, input_port, },
264 { "uart2@1_rx", 8, 0, input_port, },
265 { "uart2@1_tx", 9, 0, input_port, },
266 { "atapi", 10, 0, input_port, },
267 { "atapi", 11, 0, input_port, },
280 { "eppi@0", 0, 0, input_port, },
281 { "eppi@1", 1, 0, input_port, },
282 { "eppi@2", 2, 0, input_port, },
283 { "pixc", 3, 0, input_port, },
284 { "pixc", 4, 0, input_port, },
285 { "pixc", 5, 0, input_port, },
286 { "sport@2_rx", 6, 0, input_port, },
287 { "sport@2_tx", 7, 0, input_port, },
288 { "sport@3_rx", 8, 0, input_port, },
289 { "sport@3_tx", 9, 0, input_port, },
290 { "sdh", 10, 0, input_port, },
291 /*{ "nfc", 10, 0, input_port, },*/
292 { "spi@2", 11, 0, input_port, },
293 { "uart2@2_rx", 12, 0, input_port, },
294 { "uart2@2_tx", 13, 0, input_port, },
295 { "uart2@3_rx", 14, 0, input_port, },
296 { "uart2@3_tx", 15, 0, input_port, },
307 { "sport@0_rx", 0, 0, input_port, },
308 { "sport@0_tx", 1, 0, input_port, },
309 { "sport@1_rx", 2, 0, input_port, },
310 { "sport@1_tx", 3, 0, input_port, },
311 { "spi@0", 4, 0, input_port, },
312 { "uart@0_rx", 5, 0, input_port, },
313 { "uart@0_tx", 6, 0, input_port, },
324 { "ppi@0", 0, 0, input_port, },
325 { "ppi@1", 1, 0, input_port, },
337 { "ppi@0", 0, 0, input_port, },
338 { "sport@0_tx", 1, 0, input_port, },
339 { "sport@0_rx", 2, 0, input_port, },
340 { "sport@1_tx", 3, 0, input_port, },
341 { "sport@1_rx", 4, 0, input_port, },
342 { "spi@0", 5, 0, input_port, },
343 { "spi@1", 6, 0, input_port, },
344 { "uart@0_rx", 7, 0, input_port, },
345 { "uart@0_tx", 8, 0, input_port, },
Indexes created Sat Jun 27 00:24:51 UTC 2026