Cross Reference: /src/external/gpl3/gdb/dist/sim/bfin/dv-bfin

Lines Matching defs:bf537
52     } bf537;
252   bfin_sic_forward_interrupts (me, &sic->bf537.isr, &sic->bf537.imask, &sic->bf537.iar0);
289     case mmr_offset(bf537.imask):
293     case mmr_offset(bf537.iar0):
294     case mmr_offset(bf537.iar1):
295     case mmr_offset(bf537.iar2):
296     case mmr_offset(bf537.iar3):
297     case mmr_offset(bf537.iwr):
300     case mmr_offset(bf537.isr):
339     case mmr_offset(bf537.imask):
340     case mmr_offset(bf537.iar0):
341     case mmr_offset(bf537.iar1):
342     case mmr_offset(bf537.iar2):
343     case mmr_offset(bf537.iar3):
344     case mmr_offset(bf537.isr):
345     case mmr_offset(bf537.iwr):
719   bfin_sic_port_event (me, &sic->bf537.isr, bit, level);
722   if (sic->bf537.iwr & bit)
898       sic->bf537.imask = 0;
899       sic->bf537.isr = 0;
900       sic->bf537.iwr = 0xFFFFFFFF;
901       sic->bf537.iar0 = 0x10000000;
902       sic->bf537.iar1 = 0x33322221;
903       sic->bf537.iar2 = 0x66655444;
904       sic->bf537.iar3 = 0; /* XXX: fix this */
916       sic->bf537.imask = 0;
917       sic->bf537.isr = 0;
918       sic->bf537.iwr = 0xFFFFFFFF;
919       sic->bf537.iar0 = 0x22211000;
920       sic->bf537.iar1 = 0x43333332;
921       sic->bf537.iar2 = 0x55555444;
922       sic->bf537.iar3 = 0x66655555;
996       sic->bf537.imask = 0;
997       sic->bf537.isr = 0;
998       sic->bf537.iwr = 0xFFFFFFFF;
999       sic->bf537.iar0 = 0x00000000;
1000       sic->bf537.iar1 = 0x33322221;
1001       sic->bf537.iar2 = 0x55444443;
1002       sic->bf537.iar3 = 0x66600005;
OpenGrok
