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Lines Matching defs:bf561

67     } bf561;
468   bfin_sic_forward_interrupts (me, &sic->bf561.isr0, &sic->bf561.imask0, &sic->bf561.iar0);
469   bfin_sic_forward_interrupts (me, &sic->bf561.isr1, &sic->bf561.imask1, &sic->bf561.iar4);
506     case mmr_offset(bf561.imask0):
507     case mmr_offset(bf561.imask1):
511     case mmr_offset(bf561.iar0) ... mmr_offset(bf561.iar3):
512     case mmr_offset(bf561.iar4) ... mmr_offset(bf561.iar7):
513     case mmr_offset(bf561.iwr0):
514     case mmr_offset(bf561.iwr1):
517     case mmr_offset(bf561.isr0):
518     case mmr_offset(bf561.isr1):
557     case mmr_offset(bf561.imask0):
558     case mmr_offset(bf561.imask1):
559     case mmr_offset(bf561.iar0) ... mmr_offset(bf561.iar3):
560     case mmr_offset(bf561.iar4) ... mmr_offset(bf561.iar7):
561     case mmr_offset(bf561.iwr0):
562     case mmr_offset(bf561.iwr1):
563     case mmr_offset(bf561.isr0):
564     case mmr_offset(bf561.isr1):
586    on the BF54x/BF561 makes this pretty hard to pull off since their
776     case 0: bfin_sic_port_event (me, &sic->bf561.isr0, bit, level); break;
777     case 1: bfin_sic_port_event (me, &sic->bf561.isr1, bit, level); break;
781   if (sic->bf561.iwr0 & bit)
783   if (sic->bf561.iwr1 & bit)
976       sic->bf561.imask0 = sic->bf561.imask1 = 0;
977       sic->bf561.isr0 = sic->bf561.isr1 = 0;
978       sic->bf561.iwr0 = sic->bf561.iwr1 = 0xFFFFFFFF;
979       sic->bf561.iar0 = 0x00000000;
980       sic->bf561.iar1 = 0x11111000;
981       sic->bf561.iar2 = 0x21111111;
982       sic->bf561.iar3 = 0x22222222;
983       sic->bf561.iar4 = 0x33333222;
984       sic->bf561.iar5 = 0x43333333;
985       sic->bf561.iar6 = 0x21144444;
986       sic->bf561.iar7 = 0x00006552;