Lines Matching refs:sc_regs
52 if (sc->sc_sp == 0 || sc->sc_regs[R_ZERO] != 0xacedbade)
69 uc.uc_mcontext.__gregs[_REG_S0] = sc->sc_regs[R_S0];
70 uc.uc_mcontext.__gregs[_REG_S1] = sc->sc_regs[R_S1];
71 uc.uc_mcontext.__gregs[_REG_S2] = sc->sc_regs[R_S2];
72 uc.uc_mcontext.__gregs[_REG_S3] = sc->sc_regs[R_S3];
73 uc.uc_mcontext.__gregs[_REG_S4] = sc->sc_regs[R_S4];
74 uc.uc_mcontext.__gregs[_REG_S5] = sc->sc_regs[R_S5];
75 uc.uc_mcontext.__gregs[_REG_S6] = sc->sc_regs[R_S6];
76 uc.uc_mcontext.__gregs[_REG_RA] = sc->sc_regs[R_RA];
77 uc.uc_mcontext.__gregs[_REG_GP] = sc->sc_regs[R_GP];
Indexes created Thu Nov 06 17:09:51 GMT 2025