Lines Matching refs:t2
80 sll t2, v1, 32 - 20 # get x fraction
81 srl t2, t2, 32 - 20
83 bne t2, zero, 1f
87 * Find out how many leading zero bits are in t2,t3 and put in t9.
89 move v0, t2
91 bne t2, zero, 1f
119 * Now shift t2,t3 the correct number of bits.
129 sll t2, t3, t9
134 sll t2, t2, t9
136 or t2, t2, ta0
141 sll t2, t2, 32 - 20 # clear implied one bit
142 srl t2, t2, 32 - 20
147 or t0, t0, t2
154 sll t2, v1, 31 - 20 # clear exponent, extract fraction
155 or t2, t2, v0 # set implied one bit
157 srl t2, t2, 31 - 20 # shift fraction back to normal position
159 sll ta0, t2, t1 # shift right t2,t3 based on exponent
164 srl t2, t2, t1
169 addu t2, t2, ta0
174 mtc1 t2, $f1 # save denormalized result (MSW)
182 sll t8, t2, t1 # save bits shifted out
184 srl t3, t2, t1
Indexes created Thu Oct 16 14:10:15 GMT 2025