Lines Matching defs:zSig
275 Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
278 together to form the result. This means that any integer portion of `zSig'
281 than the desired result exponent whenever `zSig' is a complete, normalized
285 INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
288 return ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig;
295 and significand `zSig', and returns the proper single-precision floating-
305 The input significand `zSig' has its binary point between bits 30
307 significand must be normalized or smaller. If `zSig' is not normalized,
309 and it must not require rounding. In the usual case that `zSig' is
315 static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
339 roundBits = zSig & 0x7F;
343 && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )
352 || ( zSig + roundIncrement < 0x80000000U );
353 shift32RightJamming( zSig, - zExp, &zSig );
355 roundBits = zSig & 0x7F;
360 zSig = ( zSig + roundIncrement )>>7;
361 zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
362 if ( zSig == 0 ) zExp = 0;
363 return packFloat32( zSign, zExp, zSig );
370 and significand `zSig', and returns the proper single-precision floating-
372 `roundAndPackFloat32' except that `zSig' does not have to be normalized.
373 Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
378 normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
382 shiftCount = countLeadingZeros32( zSig ) - 1;
383 return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount );
444 Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
447 zSig'
450 than the desired result exponent whenever `zSig' is a complete, normalized
454 INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig )
458 ( ( (bits64) zExp )<<52 ) + zSig );
465 and significand `zSig', and returns the proper double-precision floating-
475 The input significand `zSig' has its binary point between bits 62
477 significand must be normalized or smaller. If `zSig' is not normalized,
479 and it must not require rounding. In the usual case that `zSig' is
485 static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )
509 roundBits = (int16)(zSig & 0x3FF);
513 && ( (sbits64) ( zSig + roundIncrement ) < 0 ) )
524 || ( zSig + roundIncrement < (bits64)LIT64( 0x8000000000000000 ) );
525 shift64RightJamming( zSig, - zExp, &zSig );
527 roundBits = (int16)(zSig & 0x3FF);
532 zSig = ( zSig + roundIncrement )>>10;
533 zSig &= ~ ( ( ( roundBits ^ 0x200 ) == 0 ) & roundNearestEven );
534 if ( zSig == 0 ) zExp = 0;
535 return packFloat64( zSign, zExp, zSig );
542 and significand `zSig', and returns the proper double-precision floating-
544 `roundAndPackFloat64' except that `zSig' does not have to be normalized.
545 Bit 63 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''
550 normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )
554 shiftCount = countLeadingZeros64( zSig ) - 1;
555 return roundAndPackFloat64( zSign, zExp - shiftCount, zSig<<shiftCount );
621 Packs the sign `zSign', exponent `zExp', and significand `zSig' into an
625 INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig )
629 z.low = (bits64)zSig;
1161 bits64 zSig;
1167 zSig = absA;
1168 return packFloat64( zSign, 0x432 - shiftCount, zSig<<shiftCount );
1175 bits64 zSig = a;
1179 return packFloat64( 0, 0x432 - shiftCount, zSig<<shiftCount );
1198 bits64 zSig;
1204 zSig = absA;
1205 return packFloatx80( zSign, 0x403E - shiftCount, zSig<<shiftCount );
1212 bits64 zSig = a;
1216 return packFloatx80( 0, 0x403E - shiftCount, zSig<<shiftCount );
1716 bits32 aSig, bSig, zSig;
1760 zSig = 0x40000000 + aSig + bSig;
1765 zSig = ( aSig + bSig )<<1;
1767 if ( (sbits32) zSig < 0 ) {
1768 zSig = aSig + bSig;
1772 return roundAndPackFloat32( zSign, zExp, zSig );
1788 bits32 aSig, bSig, zSig;
1826 zSig = bSig - aSig;
1844 zSig = aSig - bSig;
1848 return normalizeRoundAndPackFloat32( zSign, zExp, zSig );
1909 bits32 zSig;
1948 zSig = (bits32)zSig64;
1949 if ( 0 <= (sbits32) ( zSig<<1 ) ) {
1950 zSig <<= 1;
1953 return roundAndPackFloat32( zSign, zExp, zSig );
1968 bits32 aSig, bSig, zSig;
2012 zSig = (bits32)((((bits64) aSig) << 32) / bSig);
2013 if ( ( zSig & 0x3F ) == 0 ) {
2014 zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 );
2016 return roundAndPackFloat32( zSign, zExp, zSig );
2135 bits32 aSig, zSig;
2158 zSig = estimateSqrt32( aExp, aSig ) + 2;
2159 if ( ( zSig & 0x7F ) <= 5 ) {
2160 if ( zSig < 2 ) {
2161 zSig = 0x7FFFFFFF;
2165 term = ( (bits64) zSig ) * zSig;
2168 --zSig;
2169 rem += ( ( (bits64) zSig )<<1 ) | 1;
2171 zSig |= ( rem != 0 );
2173 shift32RightJamming( zSig, 1, &zSig );
2175 return roundAndPackFloat32( 0, zExp, zSig );
2516 bits32 zSig;
2526 zSig = (bits32)aSig;
2527 if ( aExp || zSig ) {
2528 zSig |= 0x40000000;
2531 return roundAndPackFloat32( aSign, aExp, zSig );
2682 bits64 aSig, bSig, zSig;
2726 zSig = LIT64( 0x4000000000000000 ) + aSig + bSig;
2731 zSig = ( aSig + bSig )<<1;
2733 if ( (sbits64) zSig < 0 ) {
2734 zSig = aSig + bSig;
2738 return roundAndPackFloat64( zSign, zExp, zSig );
2754 bits64 aSig, bSig, zSig;
2792 zSig = bSig - aSig;
2810 zSig = aSig - bSig;
2814 return normalizeRoundAndPackFloat64( zSign, zExp, zSig );
2932 bits64 aSig, bSig, zSig;
2978 zSig = estimateDiv128To64( aSig, 0, bSig );
2979 if ( ( zSig & 0x1FF ) <= 2 ) {
2980 mul64To128( bSig, zSig, &term0, &term1 );
2983 --zSig;
2986 zSig |= ( rem1 != 0 );
2988 return roundAndPackFloat64( zSign, zExp, zSig );
3090 bits64 aSig, zSig, doubleZSig;
3113 zSig = estimateSqrt32( aExp, aSig>>21 );
3115 zSig = estimateDiv128To64( aSig, 0, zSig<<32 ) + ( zSig<<30 );
3116 if ( ( zSig & 0x1FF ) <= 5 ) {
3117 doubleZSig = zSig<<1;
3118 mul64To128( zSig, zSig, &term0, &term1 );
3121 --zSig;
3123 add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 );
3125 zSig |= ( ( rem0 | rem1 ) != 0 );
3127 return roundAndPackFloat64( 0, zExp, zSig );
3532 bits64 aSig, zSig;
3543 shift64RightJamming( aSig, 1, &zSig );
3545 return roundAndPackFloat64( aSign, aExp, zSig );
4601 bits32 zSig;
4615 zSig = (bits32)aSig0;
4616 if ( aExp || zSig ) {
4617 zSig |= 0x40000000;
4620 return roundAndPackFloat32( aSign, aExp, zSig );