Cross Reference: /src/lib/libnvmm/libnvmm

Lines Matching defs:gprs
72 	printf("| -> RAX=%"PRIx64"\n", state->gprs[NVMM_X64_GPR_RAX]);
73 	printf("| -> RCX=%"PRIx64"\n", state->gprs[NVMM_X64_GPR_RCX]);
74 	printf("| -> RDX=%"PRIx64"\n", state->gprs[NVMM_X64_GPR_RDX]);
75 	printf("| -> RBX=%"PRIx64"\n", state->gprs[NVMM_X64_GPR_RBX]);
76 	printf("| -> RSP=%"PRIx64"\n", state->gprs[NVMM_X64_GPR_RSP]);
77 	printf("| -> RBP=%"PRIx64"\n", state->gprs[NVMM_X64_GPR_RBP]);
78 	printf("| -> RSI=%"PRIx64"\n", state->gprs[NVMM_X64_GPR_RSI]);
79 	printf("| -> RDI=%"PRIx64"\n", state->gprs[NVMM_X64_GPR_RDI]);
80 	printf("| -> RIP=%"PRIx64"\n", state->gprs[NVMM_X64_GPR_RIP]);
81 	printf("| -> RFLAGS=%p\n", (void *)state->gprs[NVMM_X64_GPR_RFLAGS]);
540 	cnt = state->gprs[NVMM_X64_GPR_RCX] & mask;
552 	state->gprs[NVMM_X64_GPR_RCX] &= ~mask;
553 	state->gprs[NVMM_X64_GPR_RCX] |= cnt;
745 			state->gprs[NVMM_X64_GPR_RIP] = exit->u.io.npc;
750 	if (__predict_false(state->gprs[NVMM_X64_GPR_RFLAGS] & PSL_D)) {
764 		gva = state->gprs[reg];
800 			memcpy(io.data, &state->gprs[NVMM_X64_GPR_RAX], io.size);
813 			memcpy(&state->gprs[NVMM_X64_GPR_RAX], io.data, io.size);
816 				state->gprs[NVMM_X64_GPR_RAX] &= size_to_mask(4);
829 			state->gprs[reg] -= iocnt * io.size;
831 			state->gprs[reg] += iocnt * io.size;
839 			state->gprs[NVMM_X64_GPR_RIP] = exit->u.io.npc;
842 		state->gprs[NVMM_X64_GPR_RIP] = exit->u.io.npc;
2789 x86_func_or(struct nvmm_vcpu *vcpu, struct nvmm_mem *mem, uint64_t *gprs)
2816 	gprs[NVMM_X64_GPR_RFLAGS] &= ~PSL_OR_MASK;
2817 	gprs[NVMM_X64_GPR_RFLAGS] |= (fl & PSL_OR_MASK);
2821 x86_func_and(struct nvmm_vcpu *vcpu, struct nvmm_mem *mem, uint64_t *gprs)
2848 	gprs[NVMM_X64_GPR_RFLAGS] &= ~PSL_AND_MASK;
2849 	gprs[NVMM_X64_GPR_RFLAGS] |= (fl & PSL_AND_MASK);
2853 x86_func_xchg(struct nvmm_vcpu *vcpu, struct nvmm_mem *mem, uint64_t *gprs)
2875 x86_func_sub(struct nvmm_vcpu *vcpu, struct nvmm_mem *mem, uint64_t *gprs)
2905 	gprs[NVMM_X64_GPR_RFLAGS] &= ~PSL_SUB_MASK;
2906 	gprs[NVMM_X64_GPR_RFLAGS] |= (fl & PSL_SUB_MASK);
2910 x86_func_xor(struct nvmm_vcpu *vcpu, struct nvmm_mem *mem, uint64_t *gprs)
2937 	gprs[NVMM_X64_GPR_RFLAGS] &= ~PSL_XOR_MASK;
2938 	gprs[NVMM_X64_GPR_RFLAGS] |= (fl & PSL_XOR_MASK);
2942 x86_func_cmp(struct nvmm_vcpu *vcpu, struct nvmm_mem *mem, uint64_t *gprs)
2960 	gprs[NVMM_X64_GPR_RFLAGS] &= ~PSL_SUB_MASK;
2961 	gprs[NVMM_X64_GPR_RFLAGS] |= (fl & PSL_SUB_MASK);
2965 x86_func_test(struct nvmm_vcpu *vcpu, struct nvmm_mem *mem, uint64_t *gprs)
2983 	gprs[NVMM_X64_GPR_RFLAGS] &= ~PSL_AND_MASK;
2984 	gprs[NVMM_X64_GPR_RFLAGS] |= (fl & PSL_AND_MASK);
2988 x86_func_mov(struct nvmm_vcpu *vcpu, struct nvmm_mem *mem, uint64_t *gprs)
2997 x86_func_stos(struct nvmm_vcpu *vcpu, struct nvmm_mem *mem, uint64_t *gprs)
3004 	if (gprs[NVMM_X64_GPR_RFLAGS] & PSL_D) {
3005 		gprs[NVMM_X64_GPR_RDI] -= mem->size;
3007 		gprs[NVMM_X64_GPR_RDI] += mem->size;
3012 x86_func_lods(struct nvmm_vcpu *vcpu, struct nvmm_mem *mem, uint64_t *gprs)
3019 	if (gprs[NVMM_X64_GPR_RFLAGS] & PSL_D) {
3020 		gprs[NVMM_X64_GPR_RSI] -= mem->size;
3022 		gprs[NVMM_X64_GPR_RSI] += mem->size;
3033 	val = state->gprs[gpr];
3110 	gva = state->gprs[NVMM_X64_GPR_RIP];
3168 	gva = state->gprs[NVMM_X64_GPR_RIP];
3192 	uint64_t *gprs;
3199 	gprs = state->gprs;
3219 	 * 	(*instr->emul->func)(vcpu, &mem, state->gprs);
3222 	if (gprs[NVMM_X64_GPR_RFLAGS] & PSL_D) {
3223 		gprs[NVMM_X64_GPR_RSI] -= size;
3224 		gprs[NVMM_X64_GPR_RDI] -= size;
3226 		gprs[NVMM_X64_GPR_RSI] += size;
3227 		gprs[NVMM_X64_GPR_RDI] += size;
3238 	uint64_t *gprs, op1, op2, fl;
3245 	gprs = state->gprs;
3265 	 * 	(*instr->emul->func)(vcpu, &mem, state->gprs);
3273 	gprs[NVMM_X64_GPR_RFLAGS] &= ~PSL_SUB_MASK;
3274 	gprs[NVMM_X64_GPR_RFLAGS] |= (fl & PSL_SUB_MASK);
3276 	if (gprs[NVMM_X64_GPR_RFLAGS] & PSL_D) {
3277 		gprs[NVMM_X64_GPR_RSI] -= size;
3278 		gprs[NVMM_X64_GPR_RDI] -= size;
3280 		gprs[NVMM_X64_GPR_RSI] += size;
3281 		gprs[NVMM_X64_GPR_RDI] += size;
3343 			val = state->gprs[instr->src.u.reg->num];
3364 		val = state->gprs[instr->dst.u.reg->num];
3369 	(*instr->emul->func)(vcpu, &mem, state->gprs);
3388 		state->gprs[instr->dst.u.reg->num] &= ~instr->dst.u.reg->mask;
3389 		state->gprs[instr->dst.u.reg->num] |= val;
3390 		state->gprs[instr->dst.u.reg->num] &= ~instr->zeroextend_mask;
3403 		state->gprs[instr->src.u.reg->num] &= ~instr->src.u.reg->mask;
3404 		state->gprs[instr->src.u.reg->num] |= val;
3405 		state->gprs[instr->src.u.reg->num] &= ~instr->zeroextend_mask;
3451 			state->gprs[NVMM_X64_GPR_RIP] += instr.len;
3473 			state->gprs[NVMM_X64_GPR_RIP] += instr.len;
3476 			if (state->gprs[NVMM_X64_GPR_RFLAGS] & PSL_Z) {
3477 				state->gprs[NVMM_X64_GPR_RIP] += instr.len;
3481 			if ((state->gprs[NVMM_X64_GPR_RFLAGS] & PSL_Z) == 0) {
3482 				state->gprs[NVMM_X64_GPR_RIP] += instr.len;
3486 		state->gprs[NVMM_X64_GPR_RIP] += instr.len;
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