Lines Matching refs:vt
12 #define V96XW(vt, x) *(volatile u_int32_t *)((vt)->vt_addr + (x))
13 #define V96XH(vt, x) *(volatile u_int16_t *)((vt)->vt_addr + (x))
14 #define V96XB(vt, x) *(volatile u_int8_t *)((vt)->vt_addr + (x))
16 #define V96XW(vt, x) *(volatile u_int32_t *)((vt)->vt_addr + (x))
17 #define V96XH(vt, x) *(volatile u_int16_t *)((vt)->vt_addr + ((x) ^ 2))
18 #define V96XB(vt, x) *(volatile u_int8_t *)((vt)->vt_addr + ((x) ^ 3))
21 #define V96X_PCI_VENDOR(vt) V96XH(vt, 0x00)
22 #define V96X_PCI_DEVICE(vt) V96XH(vt, 0x02)
23 #define V96X_PCI_CMD(vt) V96XH(vt, 0x04)
24 #define V96X_PCI_STAT(vt) V96XH(vt, 0x06)
25 #define V96X_PCI_CC_REV(vt) V96XW(vt, 0x08)
26 #define V96X_PCI_I20_BASE(vt) V96XW(vt, 0x10) /* B.2 only */
27 #define V96X_PCI_HDR_CFG(vt) V96XW(vt, 0x0c)
28 #define V96X_PCI_IO_BASE(vt) V96XW(vt, 0x10)
29 #define V96X_PCI_BASE0(vt) V96XW(vt, 0x14)
30 #define V96X_PCI_BASE1(vt) V96XW(vt, 0x18)
31 #define V96X_PCI_BPARAM(vt) V96XW(vt, 0x3c)
32 #define V96X_PCI_MAP0(vt) V96XW(vt, 0x40)
33 #define V96X_PCI_MAP1(vt) V96XW(vt, 0x44)
34 #define V96X_PCI_INT_STAT(vt) V96XW(vt, 0x48)
35 #define V96X_PCI_INT_CFG(vt) V96XW(vt, 0x4c)
36 #define V96X_LB_BASE0(vt) V96XW(vt, 0x54)
37 #define V96X_LB_BASE1(vt) V96XW(vt, 0x58)
38 #define V96X_LB_MAP0(vt) V96XH(vt, 0x5e)
39 #define V96X_LB_MAP1(vt) V96XH(vt, 0x62)
40 #define V96X_LB_BASE2(vt) V96XH(vt, 0x64) /* B.2 only */
41 #define V96X_LB_MAP2(vt) V96XH(vt, 0x66) /* B.2 only */
42 #define V96X_LB_SIZE(vt) V96XW(vt, 0x68) /* B.2 only */
43 #define V96X_LB_IO_BASE(vt) V96XW(vt, 0x6c)
44 #define V96X_FIFO_CFG(vt) V96XH(vt, 0x70)
45 #define V96X_FIFO_PRIORITY(vt) V96XH(vt, 0x72)
46 #define V96X_FIFO_STAT(vt) V96XH(vt, 0x74)
47 #define V96X_LB_ISTAT(vt) V96XB(vt, 0x76)
48 #define V96X_LB_IMASK(vt) V96XB(vt, 0x77)
49 #define V96X_SYSTEM(vt) V96XH(vt, 0x78)
50 #define V96X_LB_CFGL(vt) V96XB(vt, 0x7a)
51 #define V96X_LB_CFG(vt) V96XB(vt, 0x7b)
52 #define V96X_PCI_CFG(vt) V96XB(vt, 0x7c) /* B.2 only */
53 #define V96X_DMA_PCI_ADDR0(vt) V96XW(vt, 0x80)
54 #define V96X_DMA_LOCAL_ADDR0(vt) V96XW(vt, 0x84)
55 #define V96X_DMA_LENGTH0(vt) V96XW(vt, 0x88)
56 #define V96X_DMA_CTLB_ADR0(vt) V96XW(vt, 0x8c)
57 #define V96X_DMA_PCI_ADDR1(vt) V96XW(vt, 0x90)
58 #define V96X_DMA_LOCAL_ADDR1(vt) V96XW(vt, 0x94)
59 #define V96X_DMA_LENGTH1(vt) V96XW(vt, 0x98)
60 #define V96X_DMA_CTLB_ADR1(vt) V96XW(vt, 0x9c)
61 #define V96X_MAIL_DATA(vt, n) V96XB(vt, 0xc0 + (n))
62 #define V96X_LB_MAIL_IEWR(vt) V96XH(vt, 0xd0)
63 #define V96X_LB_MAIL_IERD(vt) V96XH(vt, 0xd2)
64 #define V96X_PCI_MAIL_IEWR(vt) V96XH(vt, 0xd4)
65 #define V96X_PCI_MAIL_IERD(vt) V96XH(vt, 0xd6)
66 #define V96X_MAIL_WR_STAT(vt) V96XH(vt, 0xd8)
67 #define V96X_MAIL_RD_STAT(vt) V96XH(vt, 0xdc)
Indexes created Mon Oct 27 08:10:08 GMT 2025