Lines Matching refs:ba
59 #define vgar(ba, reg) \
60 *(((volatile char *)ba)+(reg ^ 3))
63 #define vgaw(ba, reg, val) \
64 *(((volatile char *)ba)+(reg ^ 3)) = ((val) & 0xff)
69 #define vgario(ba, reg) \
70 *(((volatile char *)ba) + ( ByteAccessIO(reg) ))
72 #define vgawio(ba, reg, val) \
89 #define vgar32(ba, reg) \
90 *((volatile unsigned long *) (((volatile char *)ba)+reg))
93 #define vgaw32(ba, reg, val) \
94 *((volatile unsigned long *) (((volatile char *)ba)+reg)) = val
97 #define vgar16(ba, reg) \
98 *((volatile unsigned short *) (((volatile char *)ba)+reg))
101 #define vgaw16(ba, reg, val) \
102 *((volatile unsigned short *) (((volatile char *)ba)+reg)) = val
533 #define WGfx(ba, idx, val) \
534 do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0)
536 #define WSeq(ba, idx, val) \
537 do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0)
539 #define WCrt(ba, idx, val) \
540 do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0)
542 #define WAttr(ba, idx, val) \
545 tmp = vgar(ba, ACT_ADDRESS_RESET);\
547 vgaw(ba, ACT_ADDRESS_W, idx);\
548 vgaw(ba, ACT_ADDRESS_W, val);\
552 #define SetTextPlane(ba, m) \
554 WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 );\
555 WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)));\
562 GfxBusyWait (volatile void *ba)
567 test = vgar32(ba, MR_SUBSYSTEM_STATUS_CNTL);
574 GfxFifoWait(volatile void *ba)
580 test = vgar32(ba, MR_SUBSYSTEM_STATUS_CNTL);
594 RAttr(volatile void *ba, short idx)
597 vgaw(ba, ACT_ADDRESS_W, idx);
599 return vgar(ba, ACT_ADDRESS_R);
603 RSeq(volatile void *ba, short idx)
605 vgaw(ba, SEQ_ADDRESS, idx);
606 return vgar(ba, SEQ_ADDRESS_R);
610 RCrt(volatile void *ba, short idx)
612 vgaw(ba, CRT_ADDRESS, idx);
613 return vgar(ba, CRT_ADDRESS_R);
617 RGfx(volatile void *ba, short idx)
619 vgaw(ba, GCT_ADDRESS, idx);
620 return vgar(ba, GCT_ADDRESS_R);