Lines Matching refs:ba
296 volatile void *ba;
306 ba = gp->g_regkva;
359 WSeq (ba, SEQ_ID_EXTENDED_ENABLE, 0x05);
363 vgaw (ba, GREG_MISC_OUTPUT_W, 0xe3 | ((clksel & 3) * 0x04));
364 vgaw (ba, GREG_FEATURE_CONTROL_W, 0x00);
369 WSeq (ba, SEQ_ID_RESET, 0x03);
371 WSeq (ba, SEQ_ID_CLOCKING_MODE, 0x01 | ((md->FLG & MDF_CLKDIV2)/ MDF_CLKDIV2 * 8));
372 WSeq (ba, SEQ_ID_MAP_MASK, 0x0f);
373 WSeq (ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
375 WSeq (ba, SEQ_ID_MEMORY_MODE, 0x06);
377 WSeq (ba, SEQ_ID_RESET, 0x01);
378 WSeq (ba, SEQ_ID_RESET, 0x03);
380 WSeq (ba, SEQ_ID_RESET, 0x01);
383 WSeq (ba, SEQ_ID_EXT_CLOCK_MODE, 0x30 | (FW & 0x0f) | ((clksel & 4) / 4 * 0x40) );
385 WSeq (ba, SEQ_ID_MISC_FEATURE_SEL, 0xf4 | (clksel & 8) );
388 vgaw (ba, GREG_MISC_OUTPUT_W, 0xe3 | ((clksel & 3) * 0x04));
389 vgaw (ba, GREG_FEATURE_CONTROL_W, 0x00);
391 WSeq (ba, SEQ_ID_CLOCKING_MODE, 0x01 | ((md->FLG & MDF_CLKDIV2)/ MDF_CLKDIV2 * 8));
392 WSeq (ba, SEQ_ID_MAP_MASK, 0x0f);
393 WSeq (ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
395 WSeq (ba, SEQ_ID_MEMORY_MODE, 0x06);
396 WSeq (ba, SEQ_ID_RESET, 0x03);
400 WSeq (ba, SEQ_ID_CURSOR_CONTROL, 0x00);
402 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, 0x00);
403 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, 0x00);
404 WSeq (ba, SEQ_ID_DISP_OFF_HI , 0x00);
405 WSeq (ba, SEQ_ID_DISP_OFF_LO , 0x00);
407 WSeq (ba, SEQ_ID_SEC_HOST_OFF_HI, 0x00);
408 WSeq (ba, SEQ_ID_SEC_HOST_OFF_LO, 0x00);
410 WSeq (ba, SEQ_ID_EXTENDED_MEM_ENA, 0x3 | 0x4 | 0x10 | 0x40);
413 WSeq (ba, SEQ_ID_EXT_CLOCK_MODE, 0x30 | (FW & 0x0f) | ((clksel & 4) / 4 * 0x40) );
417 WSeq (ba, SEQ_ID_EXT_VIDEO_ADDR, 0x00);
419 WSeq (ba, SEQ_ID_EXT_PIXEL_CNTL, 0x00);
422 WSeq (ba, SEQ_ID_EXT_VIDEO_ADDR, 0x02);
424 WSeq (ba, SEQ_ID_EXT_PIXEL_CNTL, 0x01);
427 WSeq (ba, SEQ_ID_BUS_WIDTH_FEEDB, 0x06);
429 WSeq (ba, SEQ_ID_COLOR_EXP_WFG, 0x01);
430 WSeq (ba, SEQ_ID_COLOR_EXP_WBG, 0x00);
431 WSeq (ba, SEQ_ID_EXT_RW_CONTROL, 0x00);
434 WSeq (ba, SEQ_ID_MISC_FEATURE_SEL, 0xf4 | (clksel & 8) );
437 WSeq (ba, SEQ_ID_COLOR_KEY_CNTL, 0x40 );
439 WSeq (ba, SEQ_ID_CRC_CONTROL, 0x00 );
441 WSeq (ba, SEQ_ID_PERF_SELECT, 0x20);
443 WCrt (ba, CRT_ID_END_VER_RETR, (md->VSE & 0xf ) | 0x20);
444 WCrt (ba, CRT_ID_HOR_TOTAL, md->HT & 0xff);
445 WCrt (ba, CRT_ID_HOR_DISP_ENA_END, (HDE-1) & 0xff);
446 WCrt (ba, CRT_ID_START_HOR_BLANK, md->HBS & 0xff);
447 WCrt (ba, CRT_ID_END_HOR_BLANK, (md->HBE & 0x1f) | 0x80);
449 WCrt (ba, CRT_ID_START_HOR_RETR, md->HSS & 0xff);
450 WCrt (ba, CRT_ID_END_HOR_RETR, (md->HSE & 0x1f) | ((md->HBE & 0x20)/ 0x20 * 0x80));
451 WCrt (ba, CRT_ID_VER_TOTAL, (md->VT & 0xff));
452 WCrt (ba, CRT_ID_OVERFLOW, (( (md->VSS & 0x200) / 0x200 * 0x80)
460 WCrt (ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
463 WCrt (ba, CRT_ID_MAX_SCAN_LINE, (( (md->FLG & MDF_DBL)/ MDF_DBL * 0x80)
469 WCrt (ba, CRT_ID_MAX_SCAN_LINE, (( (md->FLG & MDF_DBL)/ MDF_DBL * 0x80)
475 WCrt (ba, CRT_ID_CURSOR_START, (md->FY & 0x1f) - 2);
476 WCrt (ba, CRT_ID_CURSOR_END, (md->FY & 0x1f) - 1);
478 WCrt (ba, CRT_ID_START_ADDR_HIGH, 0x00);
479 WCrt (ba, CRT_ID_START_ADDR_LOW, 0x00);
481 WCrt (ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
482 WCrt (ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
484 WCrt (ba, CRT_ID_START_VER_RETR, md->VSS & 0xff);
485 WCrt (ba, CRT_ID_END_VER_RETR, (md->VSE & 0x0f) | 0x80 | 0x20);
486 WCrt (ba, CRT_ID_VER_DISP_ENA_END, VDE & 0xff);
488 WCrt (ba, CRT_ID_OFFSET, (HDE / 2) & 0xff);
490 WCrt (ba, CRT_ID_OFFSET, (md->TX / 8) & 0xff);
492 WCrt (ba, CRT_ID_UNDERLINE_LOC, (md->FY-1) & 0x1f);
493 WCrt (ba, CRT_ID_START_VER_BLANK, md->VBS & 0xff);
494 WCrt (ba
496 WCrt (ba, CRT_ID_MODE_CONTROL, 0xe3);
497 WCrt (ba, CRT_ID_LINE_COMPARE, 0xff);
500 WCrt (ba, CRT_ID_EXT_HOR_TIMING1, ( 0x20
508 WCrt (ba, CRT_ID_EXT_START_ADDR, (((HDE / 2) & 0x100)/0x100 * 16));
510 WCrt (ba, CRT_ID_EXT_START_ADDR, (((md->TX / 8) & 0x100)/0x100 * 16));
512 WCrt (ba, CRT_ID_EXT_HOR_TIMING2, ( ((md->HT & 0x200)/ 0x200 * 0x01)
519 WCrt (ba, CRT_ID_EXT_VER_TIMING, ( ((md->VSE & 0x10) / 0x10 * 0x80)
527 WGfx (ba, GCT_ID_SET_RESET, 0x00);
528 WGfx (ba, GCT_ID_ENABLE_SET_RESET, 0x00);
529 WGfx (ba, GCT_ID_COLOR_COMPARE, 0x00);
530 WGfx (ba, GCT_ID_DATA_ROTATE, 0x00);
531 WGfx (ba, GCT_ID_READ_MAP_SELECT, 0x00);
532 WGfx (ba, GCT_ID_GRAPHICS_MODE, 0x00);
534 WGfx (ba, GCT_ID_MISC, 0x04);
536 WGfx (ba, GCT_ID_MISC, 0x05);
537 WGfx (ba, GCT_ID_COLOR_XCARE, 0xff);
538 WGfx (ba, GCT_ID_BITMASK, 0xff);
541 vgar (ba, GREG_STATUS1_R);
542 WAttr (ba, ACT_ID_PALETTE0, 0x00);
543 WAttr (ba, ACT_ID_PALETTE1, 0x01);
544 WAttr (ba, ACT_ID_PALETTE2, 0x02);
545 WAttr (ba, ACT_ID_PALETTE3, 0x03);
546 WAttr (ba, ACT_ID_PALETTE4, 0x04);
547 WAttr (ba, ACT_ID_PALETTE5, 0x05);
548 WAttr (ba, ACT_ID_PALETTE6, 0x06);
549 WAttr (ba, ACT_ID_PALETTE7, 0x07);
550 WAttr (ba, ACT_ID_PALETTE8, 0x08);
551 WAttr (ba, ACT_ID_PALETTE9, 0x09);
552 WAttr (ba, ACT_ID_PALETTE10, 0x0a);
553 WAttr (ba, ACT_ID_PALETTE11, 0x0b);
554 WAttr (ba, ACT_ID_PALETTE12, 0x0c);
555 WAttr (ba, ACT_ID_PALETTE13, 0x0d);
556 WAttr (ba, ACT_ID_PALETTE14, 0x0e);
557 WAttr (ba, ACT_ID_PALETTE15, 0x0f);
559 vgar (ba, GREG_STATUS1_R);
561 WAttr (ba, ACT_ID_ATTR_MODE_CNTL, 0x08);
563 WAttr (ba, ACT_ID_ATTR_MODE_CNTL, 0x09);
565 WAttr (ba, ACT_ID_OVERSCAN_COLOR, 0x00);
566 WAttr (ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
567 WAttr (ba, ACT_ID_HOR_PEL_PANNING, 0x00);
568 WAttr (ba, ACT_ID_COLOR_SELECT, 0x00);
570 vgar (ba, GREG_STATUS1_R);
572 vgaw (ba, ACT_ADDRESS_W, 0x20);
575 WCrt (ba, CRT_ID_MAX_SCAN_LINE, ( ((md->FLG & MDF_DBL)/ MDF_DBL * 0x80)
580 WCrt (ba, CRT_ID_MAX_SCAN_LINE, ( ((md->FLG & MDF_DBL)/ MDF_DBL * 0x80)
588 vgaw (ba, VDAC_REG_D, 0x02);
594 vgaw (ba, VDAC_REG_SELECT, 0x00);
602 vgaw (ba, VDAC_REG_DATA, *col++);
603 vgaw (ba, VDAC_REG_DATA, *col++);
604 vgaw (ba, VDAC_REG_DATA, *col++);
614 vgaw(ba, VDAC_REG_DATA, cols);
615 vgaw(ba, VDAC_REG_DATA, cols);
616 vgaw(ba, VDAC_REG_DATA, cols);
699 WGfx (ba, GCT_ID_READ_MAP_SELECT, 0);
702 WSeq (ba, SEQ_ID_MAP_MASK, 3);
705 WSeq (ba, SEQ_ID_MAP_MASK, 0x0f);
712 WSeq (ba, SEQ_ID_EXT_VIDEO_ADDR, RSeq(ba, SEQ_ID_EXT_VIDEO_ADDR) | 0x02);
744 gi->gd_regaddr = (void *)ztwopa(ba);
1064 volatile unsigned char *ba;
1075 ba = gfp->g_regkva;
1077 vgaw (ba, VDAC_REG_SELECT, cmap->index);
1083 *rp++ = vgar (ba, VDAC_REG_DATA);
1084 *gp++ = vgar (ba, VDAC_REG_DATA);
1085 *bp++ = vgar (ba, VDAC_REG_DATA);
1100 volatile unsigned char *ba;
1116 ba = gfp->g_regkva;
1117 vgaw (ba, VDAC_REG_SELECT, cmap->index);
1123 vgaw (ba, VDAC_REG_DATA, *rp++);
1124 vgaw (ba, VDAC_REG_DATA, *gp++);
1125 vgaw (ba, VDAC_REG_DATA, *bp++);
1137 volatile unsigned char *ba;
1139 ba = gp->g_regkva;
1140 pos->x = vgar (ba, SEQ_ID_CURSOR_X_LOC_LO) |
1141 (vgar (ba, SEQ_ID_CURSOR_X_LOC_HI) << 8);
1142 pos->y = vgar (ba, SEQ_ID_CURSOR_Y_LOC_LO) |
1143 (vgar (ba, SEQ_ID_CURSOR_Y_LOC_HI) << 8);
1150 volatile unsigned char *ba;
1152 ba = gp->g_regkva;
1153 ba, SEQ_ID_CURSOR_X_LOC_LO, pos->x & 0xff);
1154 vgaw (ba, SEQ_ID_CURSOR_X_LOC_HI, (pos->x >> 8) & 0x07);
1155 vgaw (ba, SEQ_ID_CURSOR_Y_LOC_LO, pos->y & 0xff);
1156 vgaw (ba, SEQ_ID_CURSOR_Y_LOC_HI, (pos->y >> 8) & 0x07);
1170 volatile void *ba, *fb;
1172 ba = gp->g_regkva;
1175 info->enable = vgar (ba, SEQ_ID_CURSOR_CONTROL) & 0x01;
1179 info->hot.x = vgar (ba, SEQ_ID_CURSOR_X_INDEX) & 0x1f;
1180 info->hot.y = vgar (ba, SEQ_ID_CURSOR_Y_INDEX) & 0x7f;
1188 index = vgar (ba, SEQ_ID_CURSOR_COLOR0);
1192 index = vgar (ba, SEQ_ID_CURSOR_COLOR1);
1198 int saved_bank_lo = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO);
1199 int saved_bank_hi = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI);
1204 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, last_bank_lo);
1205 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, last_bank_hi);
1207 mask = RSeq (ba, SEQ_ID_CURSOR_PIXELMASK);
1208 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, saved_bank_lo);
1209 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, saved_bank_hi);
1212 info->size.y = (RSeq (ba, SEQ_ID_CURSOR_CONTROL) & 6) << 4;
1222 volatile void *ba, *fb;
1225 ba = gp->g_regkva;
1227 control = vgar (ba, SEQ_ID_CURSOR_CONTROL);
1233 vgaw (ba, SEQ_ID_CURSOR_CONTROL, control);
1238 vgaw (ba, SEQ_ID_CURSOR_X_INDEX, info->hot.x & 0x1f);
1239 vgaw (ba, SEQ_ID_CURSOR_Y_INDEX, info->hot.y & 0x7f);
1243 vgaw (ba, SEQ_ID_CURSOR_COLOR0, 0);
1244 vgaw (ba, SEQ_ID_CURSOR_COLOR1, 1);
1247 int saved_bank_lo = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO);
1248 int saved_bank_hi = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI);
1253 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, last_bank_lo);
1254 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, last_bank_hi);
1256 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, saved_bank_lo);
1257 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, saved_bank_hi);
1259 WSeq (ba, SEQ_ID_CURSOR_PIXELMASK, mask);
1262 info->size.y = (RSeq (ba, SEQ_ID_CURSOR_CONTROL) & 6) << 4;
1264 vgaw (ba, SEQ_ID_CURSOR_CONTROL, control);
1267 WSeq (ba, SEQ_ID_CURSOR_STORE_LO, SPRITE_ADDR & 0x0f);
1268 WSeq (ba, SEQ_ID_CURSOR_STORE_HI, 0);
1269 WSeq (ba, SEQ_ID_CURSOR_ST_OFF_LO, (SPRITE_ADDR >> 4) & 0xff);
1270 WSeq (ba, SEQ_ID_CURSOR_ST_OFF_HI, ((SPRITE_ADDR >> 4) >> 8) & 0xff);
1297 volatile void *ba, fb;
1309 ba = gp->g_regkva;
1312 saved_bank_lo = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO);
1313 saved_bank_hi = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI);
1327 WGfx (ba, GCT_ID_GRAPHICS_MODE, (RGfx(ba, GCT_ID_GRAPHICS_MODE) & 0xfc) | 1);
1329 WSeq (ba, SEQ_ID_EXTENDED_MEM_ENA, (RSeq(ba, SEQ_ID_EXTENDED_MEM_ENA) & 0x1f) | 0 );
1345 WSeq (ba, SEQ_ID_SEC_HOST_OFF_LO, src_bank_lo);
1346 WSeq (ba, SEQ_ID_SEC_HOST_OFF_HI, src_bank_hi);
1347 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, dst_bank_lo);
1348 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, dst_bank_hi);