Lines Matching refs:b2
216 smc->b2.bsr = BSR_BANK2;
218 SWAP(smc->b2.mmucr), smc->b2.pnr, smc->b2.arr, smc->b2.fifo,
219 SWAP(smc->b2.ptr));
220 printf(" DATA %04x %04x IST %02x MSK %02x\n", smc->b2.data,
221 smc->b2.datax, smc->b2.ist, smc->b2.msk);
237 smc->b2.bsr = BSR_BANK2;
238 smc->b2.msk = 0;
281 smc->b2.bsr = BSR_BANK2; /* Select bank 2 */
282 smc->b2.mmucr = MMUCR_RESET;
288 smc->b2.bsr = BSR_BANK2; /* Select bank 2 */
289 smc->b2.msk = sc->sc_intctl = MSK_RX_OVRN | MSK_RX | MSK_EPHINT;
312 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2 &&
315 smc->b2.bsr);
316 smc->b2.bsr = BSR_BANK2;
319 intsts = smc->b2.ist;
320 intact = smc->b2.msk & intsts;
328 device_xname(sc->sc_dev), intsts, smc->b2.msk);
337 smc->b2.msk = 0;
341 smc->b2.ist, smc->b2.ist, smc->b2.pnr, smc->b2.arr,
342 smc->b2.fifo);
351 if ((smc->b2.arr & ARR_FAILED) == 0) {
355 printf (" arr %02x\n", smc->b2.arr);
357 save_pnr = smc->b2.pnr;
358 smc->b2.pnr = smc->b2.arr;
359 smc->b2.mmucr = MMUCR_RLSPKT;
360 while (smc->b2.mmucr & MMUCR_BUSY)
362 smc->b2.pnr = save_pnr;
372 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
374 smc->b2.bsr);
375 smc->b2.bsr = BSR_BANK2;
378 while ((smc->b2.fifo & FIFO_REMPTY) == 0) {
382 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
384 smc->b2.bsr);
385 smc->b2.bsr = BSR_BANK2;
391 smc->b2.ist = ACK_RX_OVRN;
392 printf ("->%02x\n", smc->b2.ist);
403 smc->b2.ist = ACK_TX_EMPTY;
409 smc->b2.ist, sc->sc_intctl, smc->b2.pnr,
410 smc->b2.arr);
412 if (smc->b2.ist & IST_TX) {
423 smc->b2.bsr = BSR_BANK2;
425 smc->b2.mmucr = MMUCR_RESET_TX; /* XXX reset TX FIFO */
437 printf ("->%02x\n", smc->b2.ist);
449 smc->b2.bsr = BSR_BANK2;
450 save_ptr = smc->b2.ptr;
451 save_pnr = smc->b2.pnr;
452 tx_pnr = smc->b2.fifo >> 8; /* pktno from completion fifo */
453 smc->b2.pnr = tx_pnr; /* set TX packet number */
454 smc->b2.ptr = PTR_READ; /* point to status word */
457 device_xname(sc->sc_dev), smc->b2.ist,
459 printf(" Status %04x", smc->b2.data);
462 if ((smc->b2.data & EPHSR_TX_SUC) == 0 && (tcr & TCR_TXENA) == 0) {
468 smc->b2.mmucr = MMUCR_ENQ_TX;
471 smc->b2.bsr = BSR_BANK2;
487 if (smc->b2.ist & IST_TX_EMPTY) {
488 smc->b2.mmucr = MMUCR_RESET_TX;
497 smc->b2.pnr = save_pnr;
498 smc->b2.ptr = save_ptr;
499 smc->b2.ist = ACK_TX;
501 if ((smc->b2.fifo & FIFO_TEMPTY) == 0 && n++ < 32) {
504 device_xname(sc->sc_dev), n, tx_pnr, smc->b2.ist, smc->b2.fifo);
506 printf(" %04x\n", smc->b2.fifo);
508 if (tx_pnr != (smc->b2.fifo >> 8))
519 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
521 smc->b2.bsr);
522 smc->b2.bsr = BSR_BANK2;
525 smc->b2.msk = sc->sc_intctl;
561 smc->b2.fifo);
566 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
568 smc->b2.bsr);
569 smc->b2.bsr = BSR_BANK2;
572 data = (volatile u_short *)&smc->b2.data;
573 smc->b2.ptr = PTR_RCV | PTR_AUTOINCR | PTR_READ | SWAP(0x0002);
574 (void) smc->b2.mmucr;
577 printf ("->%04x", smc->b2.fifo);
585 smc->b2.ptr = PTR_RCV | (PTR_AUTOINCR + PTR_READ) | SWAP(0x0000);
586 (void) smc->b2.mmucr;
595 device_xname(sc->sc_dev), pktctlw, pktlen, len, smc->b2.bsr);
598 if ((smc->b2.bsr & BSR_MASK) != BSR_BANK2)
601 smc->b2.bsr = BSR_BANK2;
602 smc->b2.mmucr = MMUCR_REMRLS_RX;
603 while (smc->b2.mmucr & MMUCR_BUSY)
632 smc->b2.mmucr = MMUCR_REMRLS_RX;
633 while (smc->b2.mmucr & MMUCR_BUSY)
642 smc->b2.fifo);
659 smc->b2.fifo);
715 smc->b2.mmucr = MMUCR_REMRLS_RX;
716 while (smc->b2.mmucr & MMUCR_BUSY)
769 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
771 smc->b2.bsr);
772 smc->b2.bsr = BSR_BANK2;
799 smc->b2.mmucr = MMUCR_ALLOC | (pktlen & 0x0700);
801 if ((smc->b2.arr & ARR_FAILED) == 0)
803 if (smc->b2.arr & ARR_FAILED) {
809 active_pnr = smc->b2.pnr = smc->b2.arr;
812 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
814 smc->b2.bsr);
815 smc->b2.bsr = BSR_BANK2;
818 smc->b2.ptr = PTR_AUTOINCR;
819 (void) smc->b2.mmucr;
820 data = (volatile u_short *)&smc->b2.data;
824 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
826 smc->b2.bsr);
827 smc->b2.bsr = BSR_BANK2;
859 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
861 smc->b2.bsr);
862 smc->b2.bsr = BSR_BANK2;
864 start_ptr = SWAP(smc->b2.ptr); /* save PTR before copy */
871 end_ptr = SWAP(smc->b2.ptr); /* save PTR after copy */
894 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
906 device_xname(sc->sc_dev), smc->b2.bsr);
908 smc->b2.bsr = BSR_BANK2;
912 start_ptr, end_ptr, SWAP(smc->b2.ptr));
920 smc->b2.mmucr = MMUCR_ENQ_TX;
921 if (smc->b2.pnr != active_pnr)
923 device_xname(sc->sc_dev), active_pnr, smc->b2.pnr);
931 smc->b2.msk = sc->sc_intctl;
933 while ((smc->b2.bsr & BSR_MASK) != BSR_BANK2) {
935 smc->b2.bsr);
936 smc->b2.bsr = BSR_BANK2;
Indexes created Mon Oct 20 20:10:13 GMT 2025