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Lines Matching refs:MESG_OUT_PHASE

1042 	} while (csr != (SBIC_CSR_MIS_2|MESG_OUT_PHASE)
1060 } else if (csr == (SBIC_CSR_MIS_2|MESG_OUT_PHASE)) {
1118 if (sbicxfstart(regs, 6, MESG_OUT_PHASE, sbic_cmd_wait))
1119 sbicxfout(regs, 6, dev->sc_msg, MESG_OUT_PHASE);
1163 case MESG_OUT_PHASE:
1999 while ((csr & 0x07) != MESG_OUT_PHASE) {
2007 if ((csr & 0x07) != MESG_OUT_PHASE) {
2360 case SBIC_CSR_XFERRED|MESG_OUT_PHASE:
2361 case SBIC_CSR_MIS|MESG_OUT_PHASE:
2362 case SBIC_CSR_MIS_1|MESG_OUT_PHASE:
2363 case SBIC_CSR_MIS_2|MESG_OUT_PHASE: