Lines Matching refs:SBIC_CSR_MIS_2
1042 } while (csr != (SBIC_CSR_MIS_2|MESG_OUT_PHASE)
1043 && csr != (SBIC_CSR_MIS_2|CMD_PHASE) && csr != SBIC_CSR_SEL_TIMEO);
1051 if (csr == (SBIC_CSR_MIS_2|CMD_PHASE)) {
1060 } else if (csr == (SBIC_CSR_MIS_2|MESG_OUT_PHASE)) {
1410 case SBIC_CSR_MIS_2|CMD_PHASE:
1433 case SBIC_CSR_MIS_2|DATA_OUT_PHASE:
1434 case SBIC_CSR_MIS_2|DATA_IN_PHASE:
1463 case SBIC_CSR_MIS_2|STATUS_PHASE:
2217 case SBIC_CSR_MIS_2|CMD_PHASE:
2228 case SBIC_CSR_MIS_2|STATUS_PHASE:
2281 case SBIC_CSR_MIS_2|DATA_OUT_PHASE:
2282 case SBIC_CSR_MIS_2|DATA_IN_PHASE:
2351 case SBIC_CSR_MIS_2|MESG_IN_PHASE:
2363 case SBIC_CSR_MIS_2|MESG_OUT_PHASE:
2436 csr == (SBIC_CSR_MIS_2 | MESG_IN_PHASE)) {
Indexes created Sun Oct 19 02:09:48 GMT 2025