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Lines Matching refs:sc_sync

677 	memset(&sc->sc_sync, 0, sizeof (sc->sc_sync));
762 	acb->ds.scsi_addr = (0x10000 << target) | (sc->sc_sync[target].sxfer << 8);
785 	if (sc->sc_sync[target].state == NEG_WIDE) {
787 			sc->sc_sync[target].state = NEG_DONE;
788 			sc->sc_sync[target].sbcl = 0;
789 			sc->sc_sync[target].sxfer = 0;
807 			sc->sc_sync[target].state = NEG_WAITS;
882 		rp->siop_sbcl = sc->sc_sync[target].sbcl;
955 		if (sc->sc_sync[target].state == NEG_WAITS) {
967 			sc->sc_sync[target].state = NEG_DONE;
997 			sc->sc_sync[target].sxfer = 0;
998 			sc->sc_sync[target].sbcl = 0;
1029 			rp->siop_sxfer = sc->sc_sync[target].sxfer;
1030 			rp->siop_sbcl = sc->sc_sync[target].sbcl;
1031 			if (sc->sc_sync[target].state == NEG_WAITS) {
1032 				sc->sc_sync[target].state = NEG_DONE;
1037 			sc->sc_sync[target].state = NEG_DONE;
1325 				sc->sc_sync[acb->xs->xs_periph->periph_target].sxfer;
1327 				sc->sc_sync[acb->xs->xs_periph->periph_target].sbcl;
1370 		rp->siop_sxfer = sc->sc_sync[target].sxfer;
1371 		rp->siop_sbcl = sc->sc_sync[target].sbcl;
1606 	sc->sc_sync[target].sxfer = sxfer;
1607 	sc->sc_sync[target].sbcl = sbcl;