Cross Reference: /src/sys/arch/arc/jazz/fdc

Lines Matching defs:fdc
96 	struct fdc_softc sc_fdc;	/* base fdc device */
156 	struct fdc_softc *fdc = &jsc->sc_fdc;
159 	fdc->sc_dev = self;
160 	fdc->sc_iot = ja->ja_bust;
162 	fdc->sc_maxiosize = MAXPHYS;
163 	fdc->sc_dma_start = fdc_jazzio_dma_start;
164 	fdc->sc_dma_abort = fdc_jazzio_dma_abort;
165 	fdc->sc_dma_done = fdc_jazzio_dma_done;
169 	if (bus_space_map(fdc->sc_iot, ja->ja_addr,
175 	if (bus_space_subregion(fdc->sc_iot, jsc->sc_baseioh,
176 	    FDC_OFFSET, FDC_NPORT, &fdc->sc_ioh)) {
181 	if (bus_space_map(fdc->sc_iot, jazzio_conf->jc_fdcdmareg,
195 	jazzio_intr_establish(ja->ja_intr, fdcintr, fdc);
197 	fdcattach(fdc);
201 	bus_space_unmap(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_RANGE);
203 	bus_space_unmap(fdc->sc_iot, jsc->sc_baseioh, FDC_OFFSET + FDC_NPORT);
207 fdc_jazzio_dma_start(struct fdc_softc *fdc, void *addr, size_t size,
210 	struct fdc_jazzio_softc *jsc = (struct fdc_jazzio_softc *)fdc;
213 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_ENAB, 0);
214 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_MODE, 0);
226 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
228 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
230 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
234 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
240 fdc_jazzio_dma_abort(struct fdc_softc *fdc)
242 	struct fdc_jazzio_softc *jsc = (struct fdc_jazzio_softc *)fdc;
245 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_ENAB, 0);
246 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_MODE, 0);
250 fdc_jazzio_dma_done(struct fdc_softc *fdc)
252 	struct fdc_jazzio_softc *jsc = (struct fdc_jazzio_softc *)fdc;
255 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_COUNT, 0);
256 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_ENAB, 0);
257 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_MODE, 0);
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