Lines Matching refs:_id
48 #define MESON_CLK_RESET(_id, _reg, _bit) \
49 [_id] = { \
79 #define MESON_CLK_FIXED(_id, _name, _rate) \
80 [_id] = { \
105 #define MESON_CLK_GATE_FLAGS(_id, _name, _pname, _reg, _bit, _flags) \
106 [_id] = { \
118 #define MESON_CLK_GATE(_id, _name, _pname, _reg, _bit) \
119 MESON_CLK_GATE_FLAGS(_id, _name, _pname, _reg, _bit, 0)
142 #define MESON_CLK_DIV(_id, _name, _parent, _reg, _div, _flags) \
143 [_id] = { \
172 #define MESON_CLK_FIXED_FACTOR(_id, _name, _parent, _div, _mult) \
173 [_id] = { \
199 #define MESON_CLK_MUX_RATE(_id, _name, _parents, _reg, _sel, \
201 [_id] = { \
215 #define MESON_CLK_MUX(_id, _name, _parents, _reg, _sel, _flags) \
216 [_id] = { \
262 #define MESON_CLK_PLL_RATE(_id, _name, _parent, _enable, _m, _n, _frac, _l, \
264 [_id] = { \
280 #define MESON_CLK_PLL(_id, _name, _parent, _enable, _m, _n, _frac, _l, \
282 [_id] = { \
315 #define MESON_CLK_MPLL(_id, _name, _parent, _sdm, _sdm_enable, _n2, \
317 [_id] = { \