Lines Matching defs:pll
43 struct meson_clk_pll *pll = &clk->u.pll;
62 val = CLK_READ(sc, pll->n.reg);
63 n = __SHIFTOUT(val, pll->n.mask);
65 val = CLK_READ(sc, pll->m.reg);
66 m = __SHIFTOUT(val, pll->m.mask);
68 if (pll->frac.mask) {
69 val = CLK_READ(sc, pll->frac.reg);
70 frac = __SHIFTOUT(val, pll->frac.mask);
80 rate += howmany(frac_rate, __SHIFTOUT_MASK(pll->frac.mask) + 1);
88 meson_clk_pll_wait_lock(struct meson_clk_softc *sc, struct meson_clk_pll *pll)
92 if ((CLK_READ(sc, pll->l.reg) & pll->l.mask) != 0)
102 struct meson_clk_pll *pll = &clk->u.pll;
115 if ((pll->flags & MESON_CLK_DIV_SET_RATE_PARENT) != 0)
132 m_max = __SHIFTOUT(pll->m.mask, pll->m.mask);
133 frac_max = __SHIFTOUT(pll->frac.mask, pll->frac.mask);
144 CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 1);
145 CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 0);
146 error = meson_clk_pll_wait_lock(sc, pll);
151 CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 1);
152 CLK_WRITE_BITS(sc, pll->enable.reg, pll->enable.mask, 0);
155 CLK_WRITE_BITS(sc, pll->m.reg, pll->m.mask, m);
156 CLK_WRITE_BITS(sc, pll->n.reg, pll->n.mask, n);
157 if (pll->frac.mask) {
158 CLK_WRITE_BITS(sc, pll->frac.reg, pll->frac.mask, frac);
162 CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 1);
163 CLK_WRITE_BITS(sc, pll->enable.reg, pll->enable.mask, 1);
165 CLK_WRITE_BITS(sc, pll->reset.reg, pll->reset.mask, 0);
166 error = meson_clk_pll_wait_lock(sc, pll);
177 struct meson_clk_pll *pll = &clk->u.pll;
181 return pll->parent;
Indexes created Mon Sep 29 21:09:56 GMT 2025