Lines Matching refs:MESON_CLK_DIV
195 MESON_CLK_DIV(MESONG12_CLOCK_FIXED_PLL, "fixed_pll", \
213 MESON_CLK_DIV(MESONG12_CLOCK_SYS_PLL, "sys_pll", \
231 MESON_CLK_DIV(MESONG12_CLOCK_SYS1_PLL, "sys1_pll", \
376 MESON_CLK_DIV(MESONG12_CLOCK_SD_EMMC_A_CLK0_DIV, "sd_emmc_a_clk0_div", \
382 MESON_CLK_DIV(MESONG12_CLOCK_SD_EMMC_B_CLK0_DIV, "sd_emmc_b_clk0_div", \
388 MESON_CLK_DIV(MESONG12_CLOCK_SD_EMMC_C_CLK0_DIV, "sd_emmc_c_clk0_div", \
418 MESON_CLK_DIV(MESONG12_CLOCK_MPEG_DIV, "mpeg_clk_div", \
788 MESON_CLK_DIV(MESONG12_CLOCK_CPU_CLK_DYN0_DIV, "cpu_clk_dyn0_div", \
794 MESON_CLK_DIV(MESONG12_CLOCK_CPU_CLK_DYN1_DIV, "cpu_clk_dyn1_div", \
842 MESON_CLK_DIV(MESONG12_CLOCK_CPUB_CLK_DYN0_DIV, "cpub_clk_dyn0_div", \
860 MESON_CLK_DIV(MESONG12_CLOCK_CPUB_CLK_DYN1_DIV, "cpub_clk_dyn1_div", \
888 MESON_CLK_DIV(MESONG12_CLOCK_TS_DIV, "ts_div", \
911 MESON_CLK_DIV(MESONG12_CLOCK_HDMI_PLL_OD, "hdmi_pll_od", \
917 MESON_CLK_DIV(MESONG12_CLOCK_HDMI_PLL_OD2, "hdmi_pll_od2", \
923 MESON_CLK_DIV(MESONG12_CLOCK_HDMI_PLL, "hdmi_pll", \
930 MESON_CLK_DIV(MESONG12_CLOCK_VID_PLL_DIV, "vid_pll_div", \
966 MESON_CLK_DIV(MESONG12_CLOCK_PCIE_PLL_OD, "pcie_pll_od", \
Indexes created Mon Oct 27 08:10:08 GMT 2025