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Lines Matching refs:EMAC_READ

81 #define EMAC_READ(x) \
86 #define EMAC_READ(x) ETHREG(x)
150 	//(void)EMAC_READ(ETH_ISR);
151 	u = EMAC_READ(ETH_TSR);
155 	u = EMAC_READ(ETH_RSR);
176 	tsr = EMAC_READ(ETH_TSR);
214 	imr = ~EMAC_READ(ETH_IMR);
221 	isr = EMAC_READ(ETH_ISR) & imr;
225 	EMAC_READ(ETH_RSR);		// get receive status register
232 		ctl = EMAC_READ(ETH_CTL);		// get current control register value
305 	irq = EMAC_READ(IntStsC);
336 //	(void)EMAC_READ(ETH_ISR);
337 	u = EMAC_READ(ETH_TSR);
341 	u = EMAC_READ(ETH_RSR);
469 //	(void)EMAC_READ(ETH_ISR); // why
506 	while (!(EMAC_READ(ETH_SR) & ETH_SR_IDLE))
508 	*val = EMAC_READ(ETH_MAN) & ETH_MAN_DATA;
525 	while (!(EMAC_READ(ETH_SR) & ETH_SR_IDLE))
541 	reg = EMAC_READ(ETH_CFG);
557 	if_statadd(ifp, if_collisions, EMAC_READ(ETH_SCOL) + EMAC_READ
559 	misses = EMAC_READ(ETH_DRFC);
692 		device_xname(sc->sc_dev), EMAC_READ(ETH_CTL), EMAC_READ(ETH_CFG));
732 //	(void)EMAC_READ(ETH_ISR);
733 	u = EMAC_READ(ETH_TSR);
737 	u = EMAC_READ(ETH_RSR);
759 	uint32_t ctl = EMAC_READ(ETH_CTL);
760 	uint32_t cfg = EMAC_READ(ETH_CFG);