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Lines Matching defs:sc_clk

89 	struct bcmaux_clk sc_clk[BCMAUX_NCLOCK];
142 	sc->sc_clk[BCMAUX_CLOCK_UART].base.domain = &sc->sc_clkdom;
143 	sc->sc_clk[BCMAUX_CLOCK_UART].base.name = "aux_uart";
144 	sc->sc_clk[BCMAUX_CLOCK_UART].mask = __BIT(0);
146 	sc->sc_clk[BCMAUX_CLOCK_SPI1].base.domain = &sc->sc_clkdom;
147 	sc->sc_clk[BCMAUX_CLOCK_SPI1].base.name = "aux_spi1";
148 	sc->sc_clk[BCMAUX_CLOCK_SPI1].mask = __BIT(1);
150 	sc->sc_clk[BCMAUX_CLOCK_SPI2].base.domain = &sc->sc_clkdom;
151 	sc->sc_clk[BCMAUX_CLOCK_SPI2].base.name = "aux_spi2";
152 	sc->sc_clk[BCMAUX_CLOCK_SPI2].mask = __BIT(2);
173 	return &sc->sc_clk[clkid].base;
182 		if (strcmp(name, sc->sc_clk[i].base.name) == 0)
183 			return &sc->sc_clk[i].base;