Lines Matching defs:bcs
386 bcm53xx_get_chip_ioreg_state(struct bcm53xx_chip_state *bcs,
389 bcs->bcs_lcpll_control1 = bus_space_read_4(bst, bsh,
391 bcs->bcs_lcpll_control2 = bus_space_read_4(bst, bsh,
394 bcs->bcs_genpll_control5 = bus_space_read_4(bst, bsh,
396 bcs->bcs_genpll_control6 = bus_space_read_4(bst, bsh,
398 bcs->bcs_genpll_control7 = bus_space_read_4(bst, bsh,
401 bcs->bcs_usb2_control = bus_space_read_4(bst, bsh,
404 bcs->bcs_ddr_phy_ctl_pll_status = bus_space_read_4(bst, bsh,
406 bcs->bcs_ddr_phy_ctl_pll_dividers = bus_space_read_4(bst, bsh,
411 bcm53xx_get_chip_armcore_state(struct bcm53xx_chip_state *bcs,
414 bcs->bcs_armcore_clk_policy = bus_space_read_4(bst, bsh,
416 bcs->bcs_armcore_clk_pllarma = bus_space_read_4(bst, bsh,
418 bcs->bcs_armcore_clk_pllarmb = bus_space_read_4(bst, bsh,
467 struct bcm53xx_chip_state bcs;
486 bcm53xx_get_chip_ioreg_state(&bcs, bcm53xx_ioreg_bst, bcm53xx_ioreg_bsh);
487 bcm53xx_get_chip_armcore_state(&bcs, bcm53xx_armcore_bst, bcm53xx_armcore_bsh);
492 bcm53xx_lcpll_clock_init(clk, bcs.bcs_lcpll_control1,
493 bcs.bcs_lcpll_control2);
494 bcm53xx_genpll_clock_init(clk, bcs.bcs_genpll_control5,
495 bcs.bcs_genpll_control6, bcs.bcs_genpll_control7);
496 bcm53xx_usb_clock_init(clk, bcs.bcs_usb2_control);
497 bcm53xx_get_ddr_freq(clk, bcs.bcs_ddr_phy_ctl_pll_status,
498 bcs.bcs_ddr_phy_ctl_pll_dividers);
499 bcm53xx_get_cpu_freq(clk, bcs.bcs_armcore_clk_pllarma,
500 bcs.bcs_armcore_clk_pllarmb, bcs.bcs_armcore_clk_policy);
Indexes created Tue Sep 30 17:09:57 GMT 2025