Home | History | Annotate | Download | only in cortex

Lines Matching refs:ctl

127 	pcireg_t ctl;
133 	ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
134 	ctl &= ~PCI_MSI_CTL_MSI_ENABLE;
135 	pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
137 	ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
138 	ctl &= ~PCI_MSI_CTL_MME_MASK;
139 	ctl |= __SHIFTIN(ilog2(count), PCI_MSI_CTL_MME_MASK);
140 	pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
145 	ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
146 	if (ctl & PCI_MSI_CTL_64BIT_ADDR) {
157 	ctl |= PCI_MSI_CTL_MSI_ENABLE;
158 	pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
167 	pcireg_t ctl;
173 	ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
174 	ctl &= ~PCI_MSI_CTL_MSI_ENABLE;
175 	pci_conf_write(pc, tag, off + PCI_MSI_CTL, ctl);
185 	pcireg_t ctl;
192 	ctl = pci_conf_read(pc, tag, off + PCI_MSIX_CTL);
193 	ctl &= ~PCI_MSIX_CTL_ENABLE;
194 	pci_conf_write(pc, tag, off + PCI_MSIX_CTL, ctl);
206 	ctl = pci_conf_read(pc, tag, off + PCI_MSIX_CTL);
207 	ctl |= PCI_MSIX_CTL_ENABLE;
208 	pci_conf_write(pc, tag, off + PCI_MSIX_CTL, ctl);
217 	pcireg_t ctl;
223 	ctl = pci_conf_read(pc, tag, off + PCI_MSIX_CTL);
224 	ctl &= ~PCI_MSIX_CTL_ENABLE;
225 	pci_conf_write(pc, tag, off + PCI_MSIX_CTL, ctl);