Lines Matching refs:pi
132 struct port_info *pi;
149 pi = &sc->sc_port[0];
150 pi->unit = 0;
151 pi->sc = sc;
152 pi->pxdr = EP93XX_GPIO_PADR;
153 pi->pxddr = EP93XX_GPIO_PADDR;
154 pi->xinten = EP93XX_GPIO_AIntEn;
155 pi->xinttype1 = EP93XX_GPIO_AIntType1;
156 pi->xinttype2 = EP93XX_GPIO_AIntType2;
157 pi->xeoi = EP93XX_GPIO_AEOI;
158 pi->xdb = EP93XX_GPIO_ADB;
160 pi->gpio_mask = EPGPIO_PORT_A_MASK;
162 bus_space_write_4(sc->sc_iot, sc->sc_ioh, pi->xinten, 0);
164 pi = &sc->sc_port[1];
165 pi->unit = 1;
166 pi->sc = sc;
167 pi->pxdr = EP93XX_GPIO_PBDR;
168 pi->pxddr = EP93XX_GPIO_PBDDR;
169 pi->xinten = EP93XX_GPIO_BIntEn;
170 pi->xinttype1 = EP93XX_GPIO_BIntType1;
171 pi->xinttype2 = EP93XX_GPIO_BIntType2;
172 pi->xeoi = EP93XX_GPIO_BEOI;
173 pi->xdb = EP93XX_GPIO_BDB;
175 pi->gpio_mask = EPGPIO_PORT_B_MASK;
177 bus_space_write_4(sc->sc_iot, sc->sc_ioh, pi->xinten, 0);
179 pi = &sc->sc_port[2];
180 pi->unit = 2;
181 pi->sc = sc;
182 pi->pxdr = EP93XX_GPIO_PCDR;
183 pi->pxddr = EP93XX_GPIO_PCDDR;
184 pi->xinten = pi->xinttype1 = pi->xinttype2 = pi->xeoi = pi->xdb = -1;
186 pi->gpio_mask = EPGPIO_PORT_C_MASK;
189 pi = &sc->sc_port[3];
190 pi->unit = 3;
191 pi->sc = sc;
192 pi->pxdr = EP93XX_GPIO_PDDR;
193 pi->pxddr = EP93XX_GPIO_PDDDR;
194 pi->xinten = pi->xinttype1 = pi->xinttype2 = pi->xeoi = pi->xdb = -1;
196 pi->gpio_mask = EPGPIO_PORT_D_MASK;
199 pi = &sc->sc_port[4];
200 pi->unit = 4;
201 pi->sc = sc;
202 pi->pxdr = EP93XX_GPIO_PEDR;
203 pi->pxddr = EP93XX_GPIO_PEDDR;
204 pi->xinten = pi->xinttype1 = pi->xinttype2 = pi->xeoi = pi->xdb = -1;
206 pi->gpio_mask = EPGPIO_PORT_E_MASK;
209 pi = &sc->sc_port[5];
210 pi->unit = 5;
211 pi->sc = sc;
212 pi->pxdr = EP93XX_GPIO_PFDR;
213 pi->pxddr = EP93XX_GPIO_PFDDR;
214 pi->xinten = EP93XX_GPIO_FIntEn;
215 pi->xinttype1 = EP93XX_GPIO_FIntType1;
216 pi->xinttype2 = EP93XX_GPIO_FIntType2;
217 pi->xeoi = EP93XX_GPIO_FEOI;
218 pi->xdb = EP93XX_GPIO_FDB;
220 pi->gpio_mask = EPGPIO_PORT_F_MASK;
222 bus_space_write_4(sc->sc_iot, sc->sc_ioh, pi->xinten, 0);
224 pi = &sc->sc_port[6];
225 pi->unit = 6;
226 pi->sc = sc;
227 pi->pxdr = EP93XX_GPIO_PGDR;
228 pi->pxddr = EP93XX_GPIO_PGDDR;
229 pi->xinten = pi->xinttype1 = pi->xinttype2 = pi->xeoi = pi->xdb = -1;
231 pi->gpio_mask = EPGPIO_PORT_G_MASK;
234 pi = &sc->sc_port[7];
235 pi->unit = 7;
236 pi->sc = sc;
237 pi->pxdr = EP93XX_GPIO_PHDR;
238 pi->pxddr = EP93XX_GPIO_PHDDR;
239 pi->xinten = pi->xinttype1 = pi->xinttype2 = pi->xeoi = pi->xdb = -1;
241 pi->gpio_mask = EPGPIO_PORT_H_MASK;
268 pi = &sc->sc_port[i];
273 if (pi->gpio_mask == 0x00)
276 dir = bus_space_read_4(sc->sc_iot, sc->sc_ioh, pi->pxddr) & 0xff;
277 val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, pi->pxdr) & 0xff;
289 if (pi->gpio_mask & (1 << j)) {
290 pi->pins[pin].pin_num = j;
291 pi->pins[pin].pin_caps = (GPIO_PIN_INPUT
294 pi->pins[pin].pin_flags =
297 pi->pins[pin].pin_flags =
300 pi->pins[pin].pin_state = GPIO_PIN_HIGH;
302 pi->pins[pin].pin_state = GPIO_PIN_LOW;
306 pi->gpio_chipset.gp_cookie = pi;
307 pi->gpio_chipset.gp_pin_read = epgpio_pin_read;
308 pi->gpio_chipset.gp_pin_write = epgpio_pin_write;
309 pi->gpio_chipset.gp_pin_ctl = epgpio_pin_ctl;
310 gba.gba_gc = &pi->gpio_chipset;
311 gba.gba_pins = pi->pins;
328 struct port_info *pi = (struct port_info *)gba->gba_gc->gp_cookie;
331 aprint_normal(": port %c", pi->unit+'A');
376 struct port_info *pi = &sc->sc_port[port];
379 pi->pins[bit].pin_caps = 0;
381 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, pi->pxdr) >> bit) & 1;
387 struct port_info *pi = &sc->sc_port[port];
390 pi->pins[bit].pin_caps = 0;
392 epgpio_bit_set(sc, pi->pxdr, bit);
398 struct port_info *pi = &sc->sc_port[port];
401 pi->pins[bit].pin_caps = 0;
403 epgpio_bit_clear(sc, pi->pxdr, bit);
409 struct port_info *pi = &sc->sc_port[port];
412 pi->pins[bit].pin_caps = 0;
414 epgpio_bit_clear(sc, pi->pxddr, bit);
420 struct port_info *pi = &sc->sc_port[port];
423 pi->pins[bit].pin_caps = 0;
425 epgpio_bit_set(sc, pi->pxddr, bit);
431 struct port_info *pi;
457 pi = &sc->sc_port[port];
458 epgpio_bit_clear(sc, pi->xinten, bit);
461 pi->pins[bit].pin_caps = 0;
465 epgpio_bit_set(sc, pi->xinttype1, bit);
467 epgpio_bit_clear(sc, pi->xinttype1, bit);
469 epgpio_bit_set(sc, pi->xinttype2, bit);
471 epgpio_bit_clear(sc, pi->xinttype2, bit);
473 epgpio_bit_set(sc, pi->xdb, bit);
475 epgpio_bit_clear(sc, pi->xdb, bit);
479 intq->ih_func, pi);
480 bus_space_write_4(sc->sc_iot, sc->sc_ioh, pi->xeoi, 1 << bit);
481 epgpio_bit_set(sc, pi->xinten, bit);
488 struct port_info *pi;
511 pi = &sc->sc_port[port];
512 epgpio_bit_clear(sc, pi->xinten, bit);
522 struct port_info *pi = arg;
523 struct epgpio_softc *sc = pi->sc;
531 epgpio_bit_set(sc, pi->xeoi, 0xff);
538 struct port_info *pi = arg;
539 struct epgpio_softc *sc = pi->sc;
547 epgpio_bit_set(sc, pi->xeoi, bit);
603 struct port_info *pi = arg;
604 struct epgpio_softc *sc = pi->sc;
606 pin %= pi->gpio_npins;
607 if (!pi->pins[pin].pin_caps)
611 pi->pxdr) >> pi->pins[pin].pin_num) & 1;
617 struct port_info *pi = arg;
618 struct epgpio_softc *sc = pi->sc;
620 pin %= pi->gpio_npins;
621 if (!pi->pins[pin].pin_caps)
625 epgpio_bit_set(sc, pi->pxdr, pi->pins[pin].pin_num);
627 epgpio_bit_clear(sc, pi->pxdr, pi->pins[pin].pin_num);
633 struct port_info *pi = arg;
634 struct epgpio_softc *sc = pi->sc;
636 pin %= pi->gpio_npins;
637 if (!pi->pins[pin].pin_caps)
641 epgpio_bit_clear(sc, pi->pxddr, pi->pins[pin].pin_num);
643 epgpio_bit_set(sc, pi->pxddr, pi->pins[pin].pin_num);
Indexes created Sat Feb 21 08:20:20 UTC 2026