Cross Reference: /src/sys/arch/arm/ep93xx/eppcic.c

Lines Matching refs:ph
152 	struct eppcic_handle *ph;
178 	ph = kmem_alloc(sizeof(*ph), KM_SLEEP);
179 	sc->sc_ph[0] = ph;
180 	ph->ph_sc = sc;
181 	ph->ph_socket = 0;
182 	ph->ph_port = PORT_F;
183 	ph->ph_cd[0] = SOCKET0_MCCD1;
184 	ph->ph_cd[1] = SOCKET0_MCCD2;
185 	ph->ph_vs[0] = SOCKET0_VS1;
186 	ph->ph_vs[1] = SOCKET0_VS2;
187 	ph->ph_ireq = SOCKET0_IREQ;
188 	ph->ph_space[IO].reg = EP93XX_PCMCIA0_IO;
189 	ph->ph_space[IO].base = EP93XX_PCMCIA0_HWBASE + EP93XX_PCMCIA_IO;
190 	ph->ph_space[IO].size = EP93XX_PCMCIA_IO_SIZE;
191 	ph->ph_space[COMMON].reg = EP93XX_PCMCIA0_Common;
192 	ph->ph_space[COMMON].base = EP93XX_PCMCIA0_HWBASE
194 	ph->ph_space[COMMON].size = EP93XX_PCMCIA_COMMON_SIZE;
195 	ph->ph_space[ATTRIBUTE].reg = EP93XX_PCMCIA0_Attribute;
196 	ph->ph_space[ATTRIBUTE].base = EP93XX_PCMCIA0_HWBASE
198 	ph->ph_space[ATTRIBUTE].size = EP93XX_PCMCIA_ATTRIBUTE_SIZE;
199 	eppcic_attach_socket(ph);
216 eppcic_attach_socket(struct eppcic_handle *ph)
218 	struct eppcic_softc *sc = ph->ph_sc;
220 	ph->ph_width = 16;
221 	ph->ph_vcc = 3;
222 	ph->ph_event_thread = NULL;
223 	ph->ph_run = 0;
224 	ph->ph_ih_func = NULL;
225 	ph->ph_ih_arg = NULL;
226 	epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]);
227 	epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]);
228 	epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]);
229 	epgpio_in(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]);
230 	ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]);
231 	ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]);
235 eppcic_config_socket(struct eppcic_handle *ph)
237 	struct eppcic_softc *sc = ph->ph_sc;
244 	paa.pch = (pcmcia_chipset_handle_t)ph;
245 	ph->ph_card = config_found(sc->sc_dev, &paa, eppcic_print, CFARGS_NONE);
247 	epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[0],
249 			      IPL_TTY, eppcic_intr_carddetect, ph);
250 	epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_cd[1],
252 			      IPL_TTY, eppcic_intr_carddetect, ph);
253 	wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF);
257 	ph->ph_status[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]);
258 	ph->ph_status[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]);
260 	DPRINTFN(1, ("eppcic_config_socket: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1]));
262 	ph->ph_run = 1;
263 	kthread_create(PRI_NONE, 0, NULL, eppcic_event_thread, ph,
264 	    &ph->ph_event_thread, "%s,%d", device_xname(sc->sc_dev),
265 	    ph->ph_socket);
277 	struct eppcic_handle *ph = arg;
279 	if (!(ph->ph_status[0] | ph->ph_status[1]))
280 		pcmcia_card_attach(ph->ph_card);
283 		tsleep(ph, PWAIT, "CSC wait", 0);
284 		if (!ph->ph_run)
287 		DPRINTFN(1, ("eppcic_event_thread: cd1=%d, cd2=%d\n",ph->ph_status[0],ph->ph_status[1]));
289 		if (!ph->ph_status[0] && !ph->ph_status[1])
290 			pcmcia_card_attach(ph->ph_card);
291 		else if (ph->ph_status[0] && ph->ph_status[1])
292 			pcmcia_card_detach(ph->ph_card, DETACH_FORCE);
295 	DPRINTFN(1, ("eppcic_event_thread: run=%d\n",ph->ph_run));
296 	ph->ph_event_thread = NULL;
303 	struct eppcic_handle *ph = arg;
306 	ph->ph_run = 0;
307 	wakeup(ph);
313 	struct eppcic_handle *ph = arg;
314 	struct eppcic_softc *sc = ph->ph_sc;
317 	nstatus[0] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[0]);
318 	nstatus[1] = epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_cd[1]);
322 	if (nstatus[0] != ph->ph_status[0] || nstatus[1] != ph->ph_status[1]) {
323 		ph->ph_status[0] = nstatus[0];
324 		ph->ph_status[1] = nstatus[1];
325 		wakeup(ph);
334 	struct eppcic_handle *ph = (struct eppcic_handle *)pch;
335 	struct eppcic_softc *sc = ph->ph_sc;
354 	struct eppcic_handle *ph = (struct eppcic_handle *)pch;
355 	struct eppcic_softc *sc = ph->ph_sc;
366 		ph->ph_width = 8;
368 		ph->ph_width = 16;
371 		eppcic_set_pcreg(ph, ATTRIBUTE);
372 		pa += ph->ph_space[ATTRIBUTE].base;
375 		eppcic_set_pcreg(ph, COMMON);
376 		pa += ph->ph_space[COMMON].base;
392 	struct eppcic_handle *ph = (struct eppcic_handle *)pch;
393 	struct eppcic_softc *sc = ph->ph_sc;
404 	struct eppcic_handle *ph = (struct eppcic_handle *)pch;
405 	struct eppcic_softc *sc = ph->ph_sc;
413 	pa = pih->addr + ph->ph_space[IO].base;
420 	struct eppcic_handle *ph = (struct eppcic_handle *)pch;
421 	struct eppcic_softc *sc = ph->ph_sc;
432 	struct eppcic_handle *ph = (struct eppcic_handle *)pch;
439 		ph->ph_width = 8;
444 		ph->ph_width = 16;
450 	eppcic_set_pcreg(ph, IO);
465 	struct eppcic_handle *ph = (struct eppcic_handle *)pch;
466 	struct eppcic_softc *sc = ph->ph_sc;
470 	if (ph->ph_ih_func)
473 	ph->ph_ih_func = ih_func;
474 	ph->ph_ih_arg = ih_arg;
475 	return epgpio_intr_establish(sc->sc_gpio, ph->ph_port, ph->ph_ireq,
477 				     ipl, eppcic_intr_socket, ph);
483 	struct eppcic_handle *ph = (struct eppcic_handle *)pch;
484 	struct eppcic_softc *sc = ph->ph_sc;
488 	ph->ph_ih_func = NULL;
489 	ph->ph_ih_arg = NULL;
490 	epgpio_intr_disestablish(sc->sc_gpio, ph->ph_port, ph->ph_ireq);
496 	struct eppcic_handle *ph = arg;
499 	if (ph->ph_ih_func) {
503 		err = (*ph->ph_ih_func)(ph->ph_ih_arg);
515 	struct eppcic_handle *ph = (struct eppcic_handle *)pch;
516 	struct eppcic_softc *sc = ph->ph_sc;
522 	wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_ON);
528 	ph->ph_vcc = eppcic_get_voltage(ph);
534 	struct eppcic_handle *ph = (struct eppcic_handle *)pch;
535 	struct eppcic_softc *sc = ph->ph_sc;
541 	wait = (pcic->power_ctl)(sc, ph->ph_socket, POWER_OFF);
568 eppcic_get_voltage(struct eppcic_handle *ph)
570 	struct eppcic_softc *sc = ph->ph_sc;
574 	cap = (pcic->power_capability)(sc, ph->ph_socket);
575 	if (epgpio_read(sc->sc_gpio, ph->ph_port, ph->ph_vs[0])) {
588 	DPRINTFN(1, ("eppcic_get_voltage: vs1=%d, vs2=%d (%dV)\n",epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[0]),epgpio_read_bit(sc->sc_gpio, ph->ph_port, ph->ph_vs[1]),vcc));
595 eppcic_set_pcreg(struct eppcic_handle *ph, int kind)
597 	struct eppcic_softc *sc = ph->ph_sc;
602 	switch (ph->ph_width) {
618 		switch (ph->ph_vcc) {
631 		switch (ph->ph_vcc) {
669 	DPRINTFN(1, ("eppcic_set_pcreg: width=%d, access=%d, hold=%d, pre-charge=%d\n",ph->ph_width,atiming,htiming,ptiming));
671 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, ph->ph_space[kind].reg,
676 	tsleep(ph->ph_space, PWAIT, "eppcic_set_pcreg", hz / 4);
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