Cross Reference: /src/sys/arch/arm/imx/imxuart.c

Lines Matching defs:ucr2
1038  * RTS output is controlled by UCR2.CTS bit.
1042  * note: if UCR2.CTSC == 1 for automatic HW flow control, UCR2.CTS is ignored.
1050 	uint32_t ucr2 = sc->sc_ucr2_d;
1064 		CLR(ucr2, ucr2_mask);
1069 		SET(ucr2, ucr2_mask);
1074 		CLR(ucr2, ucr2_mask);
1076 		SET(ucr2, ucr2_mask);
1086 	if (ucr2 == sc->sc_ucr2_d)
1089 	sc->sc_ucr2_d = ucr2;
1091 	ucr2 = (sc->sc_ucr2 & ~IMX_UCR2_CTS) |
1092 	    (ucr2 & IMX_UCR2_CTS);
1094 	bus_space_write_4(iot, ioh, IMX_UCR2, ucr2);
1095 	sc->sc_ucr2 = ucr2;
1180 	uint32_t ucr2;
1215 	ucr2 = cflag_to_ucr2(t->c_cflag, sc->sc_ucr2_d);
1269 	if (!change_speed && ucr2 == sc->sc_ucr2_d) {
1273 		if (ucr2 != sc->sc_ucr2_d) {
1274 			sc->sc_ucr2_d = ucr2;
1286 		    (ucr2 == sc->sc_ucr2_d ? 0 : IMXUART_PEND_PARAM) |
1288 		sc->sc_ucr2_d = ucr2;
1968 	uint32_t ucr1, ucr2;
1971 	ucr2 = sc->sc_ucr2;
1975 		ucr2 |= IMX_UCR2_ATEN;
1979 		ucr2 &= ~IMX_UCR2_ATEN;
1982 	if (ucr1 != sc->sc_ucr1 || ucr2 != sc->sc_ucr2) {
1984 		sc->sc_ucr2 = ucr2;
2018 	uint32_t ucr2;
2022 	ucr2 = (sc->sc_ucr2_d & ~IMX_UCR2_ATEN) |
2025 	bus_space_write_4(iot, ioh, IMX_UCR2, ucr2);
2026 	sc->sc_ucr2 = ucr2;
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