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Lines Matching refs:phandle

78 	const int phandle = faa->faa_phandle;
85 	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
96 	sc->sc_clk_ipg = fdtbus_clock_get(phandle, "ipg");
101 	sc->sc_clk_enet = fdtbus_clock_get(phandle, "ahb");
106 	sc->sc_clk_enet_ref = fdtbus_clock_get(phandle, "ptp");
112 	if (fdtbus_clock_enable(phandle, "enet_clk_ref", false) != 0) {
116 	if (fdtbus_clock_enable(phandle, "enet_out", false) != 0) {
129 	sc->sc_imxtype = of_compatible_lookup(phandle, compat_data)->value;
131 	sc->sc_phyid = enet_phy_id(sc, phandle);
133 	const char *phy_mode = fdtbus_get_string(phandle, "phy-mode");
155 	sc->sc_ih = enet_intr_establish(sc, phandle, 0);
160 		sc->sc_ih2 = enet_intr_establish(sc, phandle, 1);
161 		sc->sc_ih3 = enet_intr_establish(sc, phandle, 2);
169 	enet_phy_reset(efsc, phandle);
182 enet_intr_establish(struct enet_softc *sc, int phandle, u_int index)
188 	if (!fdtbus_intr_str(phandle, index, intrstr, sizeof(intrstr))) {
196 	ih = fdtbus_intr_establish_xname(phandle, index, IPL_NET, 0,
233 enet_phy_reset(struct enet_fdt_softc *sc, const int phandle)
237 	sc->sc_pin_reset = fdtbus_gpio_acquire(phandle, "phy-reset-gpios", GPIO_PIN_OUTPUT);
243 	if (of_getprop_uint32(phandle, "phy-reset-duration", &msec))
252 	if (of_getprop_uint32(phandle, "phy-reset-post-delay", &msec))
259 enet_phy_id(struct enet_softc *sc, const int phandle)
264 	phy_phandle = fdtbus_get_phandle(phandle, "phy-handle");