Lines Matching refs:PAD_CTL_DSE_MASK
2259 #define PAD_CTL_DSE_MASK __BITS(5, 3)
2260 #define PAD_CTL_DSE_HIZ __SHIFTIN(0x0, PAD_CTL_DSE_MASK)
2261 #define PAD_CTL_DSE_290OHM __SHIFTIN(0x1, PAD_CTL_DSE_MASK)
2262 #define PAD_CTL_DSE_240OHM __SHIFTIN(0x1, PAD_CTL_DSE_MASK)
2263 #define PAD_CTL_DSE_121OHM __SHIFTIN(0x2, PAD_CTL_DSE_MASK)
2264 #define PAD_CTL_DSE_120OHM __SHIFTIN(0x2, PAD_CTL_DSE_MASK)
2265 #define PAD_CTL_DSE_80OHM __SHIFTIN(0x3, PAD_CTL_DSE_MASK)
2266 #define PAD_CTL_DSE_76OHM __SHIFTIN(0x3, PAD_CTL_DSE_MASK)
2267 #define PAD_CTL_DSE_60OHM __SHIFTIN(0x4, PAD_CTL_DSE_MASK)
2268 #define PAD_CTL_DSE_48OHM __SHIFTIN(0x5, PAD_CTL_DSE_MASK)
2269 #define PAD_CTL_DSE_47OHM __SHIFTIN(0x4, PAD_CTL_DSE_MASK)
2270 #define PAD_CTL_DSE_45OHM __SHIFTIN(0x5, PAD_CTL_DSE_MASK)
2271 #define PAD_CTL_DSE_40OHM __SHIFTIN(0x6, PAD_CTL_DSE_MASK)
2272 #define PAD_CTL_DSE_37OHM __SHIFTIN(0x6, PAD_CTL_DSE_MASK)
2273 #define PAD_CTL_DSE_34OHM __SHIFTIN(0x7, PAD_CTL_DSE_MASK)
2274 #define PAD_CTL_DSE_31OHM __SHIFTIN(0x7, PAD_CTL_DSE_MASK)
Indexes created Sun Oct 19 16:10:00 GMT 2025