Lines Matching defs:pll
48 struct imx_ccm_pll *pll = &clk->u.pll;
53 if ((pll->flags & IMX_PLL_ENET) != 0)
58 val = CCM_READ(sc, clk->regidx, pll->reg);
63 CCM_WRITE(sc, clk->regidx, pll->reg, val);
72 struct imx_ccm_pll *pll= &clk->u.pll;
86 if ((pll->flags & IMX_PLL_ENET) != 0) {
87 /* For ENET PLL, div_mask contains the fixed output rate */
88 return pll->div_mask;
91 const uint32_t val = CCM_READ(sc, clk->regidx, pll->reg);
92 const u_int div = __SHIFTOUT(val, pll->div_mask);
94 if ((pll->flags & IMX_PLL_ARM) != 0) {
98 if ((pll->flags & IMX_PLL_480M_528M) != 0) {
109 struct imx_ccm_pll *pll = &clk->u.pll;
113 return pll->parent;
Indexes created Tue Sep 23 14:10:03 GMT 2025