Lines Matching refs:_name
131 #define CLK_FIXED(_name, _rate) { \
132 .base = { .name = (_name) }, .type = EXYNOS_CLK_FIXED, \
136 #define CLK_PLL(_name, _parent, _lock, _con0) { \
137 .base = { .name = (_name) }, .type = EXYNOS_CLK_PLL, \
147 #define CLK_MUXF(_name, _alias, _reg, _bits, _f, _p) { \
148 .base = { .name = (_name), .flags = (_f) }, \
161 #define CLK_MUXA(_name, _alias, _reg, _bits, _p) \
162 CLK_MUXF(_name, _alias, _reg, _bits, 0, _p)
164 #define CLK_MUX(_name, _reg, _bits, _p) \
165 CLK_MUXF(_name, NULL, _reg, _bits, 0, _p)
167 #define CLK_DIVF(_name, _parent, _reg, _bits, _f) { \
168 .base = { .name = (_name), .flags = (_f) }, \
179 #define CLK_DIV(_name, _parent, _reg, _bits) \
180 CLK_DIVF(_name, _parent, _reg, _bits, 0)
182 #define CLK_GATE(_name, _parent, _reg, _bits, _f) { \
183 .base = { .name = (_name), .flags = (_f) }, \
Indexes created Wed Oct 15 07:09:58 GMT 2025