Cross Reference: /src/sys/arch/arm/samsung/exynos

Lines Matching refs:sc
78 exynos_wdt_wdog_read(struct exynos_wdt_softc *sc, bus_size_t o)
80 	return bus_space_read_4(sc->sc_bst, sc->sc_wdog_bsh, o);
84 exynos_wdt_wdog_write(struct exynos_wdt_softc *sc, bus_size_t o, uint32_t v)
86 	bus_space_write_4(sc->sc_bst, sc->sc_wdog_bsh, o, v);
106 	struct exynos_wdt_softc * const sc = smw->smw_cookie;
111 	exynos_wdt_wdog_write(sc, EXYNOS_WDT_WTCNT, sc->sc_wdog_wtdat);
112 	aprint_debug_dev(sc->sc_dev, "tickle\n");
119 	struct exynos_wdt_softc * const sc = smw->smw_cookie;
125 		sc->sc_wdog_wtcon &= ~(WTCON_ENABLE|WTCON_RESET_ENABLE);
126 		exynos_wdt_wdog_write(sc, EXYNOS_WDT_WTCON, sc->sc_wdog_wtcon);
128 		aprint_debug_dev(sc->sc_dev, "setmode disable\n");
135 	if (sc->sc_wdog_armed && smw->smw_period == sc->sc_wdog_period) {
136 		sc->sc_wdog_wtdat = sc->sc_freq * sc->sc_wdog_period - 1;
137 		sc->sc_wdog_wtcon = WTCON_ENABLE | WTCON_RESET_ENABLE
138 		    | __SHIFTIN(sc->sc_wdog_clock_select, WTCON_CLOCK_SELECT)
139 		    | __SHIFTIN(sc->sc_wdog_prescaler - 1, WTCON_PRESCALER);
141 		exynos_wdt_wdog_write(sc, EXYNOS_WDT_WTCNT, sc->sc_wdog_wtdat);
142 		exynos_wdt_wdog_write(sc, EXYNOS_WDT_WTDAT, sc->sc_wdog_wtdat);
143 		exynos_wdt_wdog_write(sc, EXYNOS_WDT_WTCON, sc->sc_wdog_wtcon);
144 		aprint_debug_dev(sc->sc_dev, "setmode refresh\n");
149 		sc->sc_wdog_period = EXYNOS_WDT_PERIOD_DEFAULT;
156 	if (smw->smw_period * sc->sc_freq >= UINT16_MAX) {
160 	sc->sc_wdog_wtdat = sc->sc_freq * sc->sc_wdog_period - 1;
161 	sc->sc_wdog_wtcon = WTCON_ENABLE | WTCON_RESET_ENABLE
162 	    | __SHIFTIN(sc->sc_wdog_clock_select, WTCON_CLOCK_SELECT)
163 	    | __SHIFTIN(sc->sc_wdog_prescaler - 1, WTCON_PRESCALER);
168 	exynos_wdt_wdog_write(sc, EXYNOS_WDT_WTCON,
169 	    sc->sc_wdog_wtcon & ~(WTCON_ENABLE | WTCON_RESET_ENABLE));
170 	exynos_wdt_wdog_write(sc, EXYNOS_WDT_WTCNT, sc->sc_wdog_wtdat);
171 	exynos_wdt_wdog_write(sc, EXYNOS_WDT_WTDAT, sc->sc_wdog_wtdat);
172 	exynos_wdt_wdog_write(sc, EXYNOS_WDT_WTCON, sc->sc_wdog_wtcon);
174 	aprint_debug_dev(sc->sc_dev, "setmode enable\n");
182         struct exynos_wdt_softc * const sc = device_private(self);
194 	sc->sc_dev = self;
195 	sc->sc_bst = faa->faa_bst;
197 	error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_wdog_bsh);
206 //	prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
207 	sc->sc_freq = 12000000;	/* MJF: HACK hardwire for now */
209 	sc->sc_wdog_wtcon = exynos_wdt_wdog_read(sc, EXYNOS_WDT_WTCON);
210 	sc->sc_wdog_armed = (sc->sc_wdog_wtcon & WTCON_ENABLE)
211 	    && (sc->sc_wdog_wtcon & WTCON_RESET_ENABLE);
212 	if (sc->sc_wdog_armed) {
213 		sc->sc_wdog_prescaler =
214 		    __SHIFTOUT(sc->sc_wdog_wtcon, WTCON_PRESCALER);
215 		sc->sc_wdog_clock_select =
216 		    __SHIFTOUT(sc->sc_wdog_wtcon, WTCON_CLOCK_SELECT);
217 		sc->sc_freq /= sc->sc_wdog_prescaler;
218 		sc->sc_freq >>= 4 + sc->sc_wdog_clock_select;
219 		sc->sc_wdog_wtdat = exynos_wdt_wdog_read(sc, EXYNOS_WDT_WTDAT);
220 		sc->sc_wdog_period = (sc->sc_wdog_wtdat + 1) / sc->sc_freq;
222 		sc->sc_wdog_period = EXYNOS_WDT_PERIOD_DEFAULT;
223 		sc->sc_wdog_prescaler = 1;
227 		u_int n = __builtin_ffs(sc->sc_freq) - 1;
229 			sc->sc_wdog_clock_select = WTCON_CLOCK_SELECT_128;
230 			sc->sc_freq >>= 7;
232 			sc->sc_wdog_clock_select = n - 4;
233 			sc->sc_freq >>= n;
239 		sc->sc_wdog_prescaler = 0;
241 		u_int max_period = 2 * EXYNOS_WDT_PERIOD_DEFAULT * sc->sc_freq;
243 			u_int remainder = sc->sc_freq % div;
245 				sc->sc_wdog_prescaler = div;
249 				sc->sc_wdog_prescaler = div;
253 		KASSERT(sc->sc_wdog_prescaler != 0);
254 		sc->sc_freq /= sc->sc_wdog_prescaler;
261 		sc->sc_wdog_armed = true;
265 	    sc->sc_wdog_period,
266 	    sc->sc_wdog_armed ? " (armed)" : "");
268 	sc->sc_smw.smw_name = device_xname(self);
269 	sc->sc_smw.smw_cookie = sc;
270 	sc->sc_smw.smw_setmode = exynos_wdt_setmode;
271 	sc->sc_smw.smw_tickle = exynos_wdt_tickle;
272 	sc->sc_smw.smw_period = sc->sc_wdog_period;
274 	if (sc->sc_wdog_armed) {
275 		error = sysmon_wdog_setmode(&sc->sc_smw, WDOG_MODE_KTICKLE,
276 		    sc->sc_wdog_period);
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