Lines Matching refs:SUNXI_CCU_GATE
206 SUNXI_CCU_GATE(A31_CLK_AHB1_DMA, "ahb1-dma", "ahb1",
208 SUNXI_CCU_GATE(A31_CLK_AHB1_MMC0, "ahb1-mmc0", "ahb1",
210 SUNXI_CCU_GATE(A31_CLK_AHB1_MMC1, "ahb1-mmc1", "ahb1",
212 SUNXI_CCU_GATE(A31_CLK_AHB1_MMC2, "ahb1-mmc2", "ahb1",
214 SUNXI_CCU_GATE(A31_CLK_AHB1_MMC3, "ahb1-mmc3", "ahb1",
216 SUNXI_CCU_GATE(A31_CLK_AHB1_EMAC, "ahb1-emac", "ahb1",
218 SUNXI_CCU_GATE(A31_CLK_AHB1_OTG, "ahb1-otg", "ahb1",
220 SUNXI_CCU_GATE(A31_CLK_AHB1_EHCI0, "ahb1-ehci0", "ahb1",
222 SUNXI_CCU_GATE(A31_CLK_AHB1_EHCI1, "ahb1-ehci1", "ahb1",
224 SUNXI_CCU_GATE(A31_CLK_AHB1_OHCI0, "ahb1-ohci0", "ahb1",
226 SUNXI_CCU_GATE(A31_CLK_AHB1_OHCI1, "ahb1-ohci1", "ahb1",
228 SUNXI_CCU_GATE(A31_CLK_AHB1_OHCI2, "ahb1-ohci2", "ahb1",
231 SUNXI_CCU_GATE(A31_CLK_APB1_CODEC, "apb1-codec", "apb1",
233 SUNXI_CCU_GATE(A31_CLK_APB1_PIO, "apb1-pio", "apb1",
236 SUNXI_CCU_GATE(A31_CLK_APB2_I2C0, "apb2-i2c0", "apb2",
238 SUNXI_CCU_GATE(A31_CLK_APB2_I2C1, "apb2-i2c1", "apb2",
240 SUNXI_CCU_GATE(A31_CLK_APB2_I2C2, "apb2-i2c2", "apb2",
242 SUNXI_CCU_GATE(A31_CLK_APB2_I2C3, "apb2-i2c3", "apb2",
244 SUNXI_CCU_GATE(A31_CLK_APB2_UART0, "apb2-uart0", "apb2",
246 SUNXI_CCU_GATE(A31_CLK_APB2_UART1, "apb2-uart1", "apb2",
248 SUNXI_CCU_GATE(A31_CLK_APB2_UART2, "apb2-uart2", "apb2",
250 SUNXI_CCU_GATE(A31_CLK_APB2_UART3, "apb2-uart3", "apb2",
252 SUNXI_CCU_GATE(A31_CLK_APB2_UART4, "apb2-uart4", "apb2",
254 SUNXI_CCU_GATE(A31_CLK_APB2_UART5, "apb2-uart5", "apb2",
257 SUNXI_CCU_GATE(A31_CLK_USB_PHY0, "usb-phy0", "hosc",
259 SUNXI_CCU_GATE(A31_CLK_USB_PHY1, "usb-phy1", "hosc",
261 SUNXI_CCU_GATE(A31_CLK_USB_PHY2, "usb-phy2", "hosc",
263 SUNXI_CCU_GATE(A31_CLK_USB_OHCI0, "usb-ohci0", "hosc",
265 SUNXI_CCU_GATE(A31_CLK_USB_OHCI1, "usb-ohci1", "hosc",
267 SUNXI_CCU_GATE(A31_CLK_USB_OHCI2, "usb-ohci2", "hosc",
270 SUNXI_CCU_GATE(A31_CLK_CODEC, "codec", "pll_audio",
Indexes created Wed Oct 22 13:09:56 GMT 2025