Lines Matching refs:SUNXI_CCU_GATE
308 SUNXI_CCU_GATE(A80_CLK_BUS_FD, "ahb0-fd", "ahb0",
310 SUNXI_CCU_GATE(A80_CLK_BUS_GPU_CTRL, "ahb0-gpu-ctrl", "ahb0",
312 SUNXI_CCU_GATE(A80_CLK_BUS_SS, "ahb0-ss", "ahb0",
314 SUNXI_CCU_GATE(A80_CLK_BUS_MMC, "ahb0-mmc", "ahb0",
316 SUNXI_CCU_GATE(A80_CLK_BUS_NAND1, "ahb0-nand1", "ahb0",
318 SUNXI_CCU_GATE(A80_CLK_BUS_NAND0, "ahb0-nand0", "ahb0",
320 SUNXI_CCU_GATE(A80_CLK_BUS_TS, "ahb0-ts", "ahb0",
322 SUNXI_CCU_GATE(A80_CLK_BUS_SPI0, "ahb0-spi0", "ahb0",
324 SUNXI_CCU_GATE(A80_CLK_BUS_SPI1, "ahb0-spi1", "ahb0",
326 SUNXI_CCU_GATE(A80_CLK_BUS_SPI2, "ahb0-spi2", "ahb0",
328 SUNXI_CCU_GATE(A80_CLK_BUS_SPI3, "ahb0-spi3", "ahb0",
331 SUNXI_CCU_GATE(A80_CLK_BUS_USB, "ahb1-usb", "ahb1",
333 SUNXI_CCU_GATE(A80_CLK_BUS_GMAC, "ahb1-gmac", "ahb1",
335 SUNXI_CCU_GATE(A80_CLK_BUS_MSGBOX, "ahb1-msgbox", "ahb1",
337 SUNXI_CCU_GATE(A80_CLK_BUS_SPINLOCK, "ahb1-spinlock", "ahb1",
339 SUNXI_CCU_GATE(A80_CLK_BUS_HSTIMER, "ahb1-hstimer", "ahb1",
341 SUNXI_CCU_GATE(A80_CLK_BUS_DMA, "ahb1-dma", "ahb1",
344 SUNXI_CCU_GATE(A80_CLK_BUS_LCD0, "ahb2-lcd0", "ahb2",
346 SUNXI_CCU_GATE(A80_CLK_BUS_LCD1, "ahb2-lcd1", "ahb2",
348 SUNXI_CCU_GATE(A80_CLK_BUS_CSI, "ahb2-csi", "ahb2",
350 SUNXI_CCU_GATE(A80_CLK_BUS_DE, "ahb2-de", "ahb2",
352 SUNXI_CCU_GATE(A80_CLK_BUS_MP, "ahb2-mp", "ahb2",
355 SUNXI_CCU_GATE(A80_CLK_BUS_PIO, "apb0-pio", "apb0",
357 SUNXI_CCU_GATE(A80_CLK_BUS_LRADC, "apb0-lradc", "apb0",
359 SUNXI_CCU_GATE(A80_CLK_BUS_GPADC, "apb0-gpadc", "apb0",
362 SUNXI_CCU_GATE(A80_CLK_BUS_I2C0, "apb1-i2c0", "apb1",
364 SUNXI_CCU_GATE(A80_CLK_BUS_I2C1, "apb1-i2c1", "apb1",
366 SUNXI_CCU_GATE(A80_CLK_BUS_I2C2, "apb1-i2c2", "apb1",
368 SUNXI_CCU_GATE(A80_CLK_BUS_I2C3, "apb1-i2c3", "apb1",
370 SUNXI_CCU_GATE(A80_CLK_BUS_I2C4, "apb1-i2c4", "apb1",
372 SUNXI_CCU_GATE(A80_CLK_BUS_UART0, "apb1-uart0", "apb1",
374 SUNXI_CCU_GATE(A80_CLK_BUS_UART1, "apb1-uart1", "apb1",
376 SUNXI_CCU_GATE(A80_CLK_BUS_UART2, "apb1-uart2", "apb1",
378 SUNXI_CCU_GATE(A80_CLK_BUS_UART3, "apb1-uart3", "apb1",
380 SUNXI_CCU_GATE(A80_CLK_BUS_UART4, "apb1-uart4", "apb1",
382 SUNXI_CCU_GATE(A80_CLK_BUS_UART5, "apb1-uart5", "apb1",
Indexes created Mon Oct 20 16:09:52 GMT 2025