Lines Matching defs:timing
498 int error, timing = SUNXI_MMC_TIMING_400K;
502 timing = SUNXI_MMC_TIMING_400K;
504 timing = SUNXI_MMC_TIMING_25M;
507 timing = sc->sc_mmc_width == 8 ?
511 timing = SUNXI_MMC_TIMING_50M;
528 delays = &sc->sc_config->delays[timing];
869 /* For 8bits ddr in old timing modes, and all ddr in new
870 * timing modes, the module clock has to be 2x the card clock.
983 sunxi_mmc_execute_tuning(sdmmc_chipset_handle_t sch, int timing)
985 switch (timing) {
Indexes created Wed Oct 01 19:09:53 GMT 2025