Cross Reference: /src/sys/arch/arm/sunxi/sunxi

Lines Matching refs:chip
156 sunxi_nand_rb_state(struct sunxi_nand_softc *sc, struct sunxi_nand_chip *chip)
158 	if (chip->chip_rb_pin != NULL)
159 		return fdtbus_gpio_read(chip->chip_rb_pin);
162 	return __SHIFTOUT(status, NDFC_ST_RB_STATE(chip->chip_rb));
223     struct sunxi_nand_chip *chip)
225 	if (chip->chip_addr_count == 0)
231 	NAND_WRITE(sc, NDFC_ADDR_LOW, chip->chip_addr[0]);
232 	NAND_WRITE(sc, NDFC_ADDR_HIGH, chip->chip_addr[1]);
235 	    __SHIFTIN(chip->chip_addr_count - 1, NDFC_CMD_ADR_NUM));
240 	chip->chip_addr[0] = 0;
241 	chip->chip_addr[1] = 0;
242 	chip->chip_addr_count = 0;
249 	struct sunxi_nand_chip * const chip = &sc->sc_chip;
257 	sunxi_nand_send_address(sc, chip);
306 	struct sunxi_nand_chip * const chip = &sc->sc_chip;
314 	sunxi_nand_send_address(sc, chip);
367 	struct sunxi_nand_chip * const chip = &sc->sc_chip;
368 	struct nand_softc * const nand_sc = device_private(chip->chip_dev);
375 		ctl |= __SHIFTIN(chip->chip_cs, NDFC_CTL_CE_SEL);
377 		ctl |= __SHIFTIN(chip->chip_rb, NDFC_CTL_RB_SEL);
398 	struct sunxi_nand_chip * const chip = &sc->sc_chip;
400 	sunxi_nand_send_address(sc, chip);
415 	struct sunxi_nand_chip * const chip = &sc->sc_chip;
416 	const u_int index = chip->chip_addr_count / 4;
417 	const u_int shift = (chip->chip_addr_count & 3) * 8;
421 	chip->chip_addr[index] |= ((uint32_t)address << shift);
422 	chip->chip_addr_count++;
429 	struct sunxi_nand_chip * const chip = &sc->sc_chip;
431 	while (!sunxi_nand_rb_state(sc, chip))
505     struct sunxi_nand_chip *chip, int phandle)
507 	struct nand_interface *nand = &chip->chip_nand;
510 	chip->chip_sc = sc;
511 	chip->chip_phandle = phandle;
513 	if (of_getprop_uint32(phandle, "reg", &chip->chip_cs) != 0) {
515 		    "missing 'reg' property on chip node\n");
519 	if (of_getprop_uint32(phandle, "allwinner,rb", &chip->chip_rb) != 0) {
521 		    "chip #%u: missing 'allwinner,rb' property\n",
522 		    chip->chip_cs);
531 		chip->chip_eccmode = ECC_MODE_NONE;
533 		chip->chip_eccmode = ECC_MODE_HW;
535 		chip->chip_eccmode = ECC_MODE_HW_SYNDROME;
537 		chip->chip_eccmode = ECC_MODE_SOFT;
539 		chip->chip_eccmode = ECC_MODE_SOFT_BCH;
541 		chip->chip_eccmode = ECC_MODE_UNKNOWN;
544 	switch (chip->chip_eccmode) {
551 	aprint_normal_dev(sc->sc_dev, "chip #%u: RB %u, ECC mode '%s'\n",
552 	    chip->chip_cs, chip->chip_rb, ecc_mode);
569 	switch (chip->chip_eccmode) {
580 		    "chip #%u: ECC mode not supported by driver\n",
581 		    chip->chip_cs);
589 	chip->chip_dev = nand_attach_mi(nand, sc->sc_dev);
590 	if (chip->chip_dev == NULL)
599 		nand_attach_mtdparts(chip->chip_dev, mtd_id, mtdparts);
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