Lines Matching defs:aqm_reg_write
195 aqm_reg_write(struct ixpqmgr_softc *sc, bus_size_t off, uint32_t val)
408 aqm_reg_write(sc, qi->qAccRegAddr, entry);
430 aqm_reg_write(sc, qi->qUOStatRegAddr,
488 aqm_reg_write(sc, qi->qUOStatRegAddr,
527 aqm_reg_write(sc, qi->qUOStatRegAddr,
761 aqm_reg_write(sc, IX_QMGR_QINTREG0_OFFSET, intRegVal);
918 aqm_reg_write(sc, reg, v | (1 << (qId % IX_QMGR_MIN_QUEUPP_QID)));
935 aqm_reg_write(sc, reg, v &~ (1 << (qId % IX_QMGR_MIN_QUEUPP_QID)));
1009 aqm_reg_write(sc, IX_QMGR_Q_CONFIG_ADDR_GET(qId), qCfg);
1042 aqm_reg_write(sc, off, v);
1054 aqm_reg_write(sc, IX_QMGR_QUELOWSTAT0_OFFSET,
1056 aqm_reg_write(sc, IX_QMGR_QUELOWSTAT1_OFFSET,
1058 aqm_reg_write(sc, IX_QMGR_QUELOWSTAT2_OFFSET,
1060 aqm_reg_write(sc, IX_QMGR_QUELOWSTAT3_OFFSET,
1064 aqm_reg_write(sc, IX_QMGR_QUEUOSTAT0_OFFSET,
1066 aqm_reg_write(sc, IX_QMGR_QUEUOSTAT1_OFFSET,
1070 aqm_reg_write(sc, IX_QMGR_QUEUPPSTAT0_OFFSET,
1074 aqm_reg_write(sc, IX_QMGR_QUEUPPSTAT1_OFFSET,
1078 aqm_reg_write(sc, IX_QMGR_INT0SRCSELREG0_OFFSET,
1080 aqm_reg_write(sc, IX_QMGR_INT0SRCSELREG1_OFFSET,
1082 aqm_reg_write(sc, IX_QMGR_INT0SRCSELREG2_OFFSET,
1084 aqm_reg_write(sc, IX_QMGR_INT0SRCSELREG3_OFFSET,
1088 aqm_reg_write(sc, IX_QMGR_QUEIEREG0_OFFSET,
1090 aqm_reg_write(sc, IX_QMGR_QUEIEREG1_OFFSET,
1094 aqm_reg_write(sc, IX_QMGR_QINTREG0_OFFSET, IX_QMGR_QINTREG_RESET_VALUE);
1095 aqm_reg_write(sc, IX_QMGR_QINTREG1_OFFSET, IX_QMGR_QINTREG_RESET_VALUE);
1099 aqm_reg_write
1105 aqm_reg_write(sc, i, 0);